Kholdoun Torki

Orcid: 0000-0002-1335-0232

According to our database1, Kholdoun Torki authored at least 23 papers between 1988 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

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Bibliography

2015
Enhancing a 32-Bit Processor Core with Efficient Cryptographic Instructions.
J. Circuits Syst. Comput., 2015

2014
A low-resource 32-bit datapath ECDSA design for embedded applications.
Proceedings of the International Carnahan Conference on Security Technology, 2014

Instruction set extensions of AES algorithms for 32-bit processors.
Proceedings of the International Carnahan Conference on Security Technology, 2014

2013
A New Scheduling Protocol Design Based on Deficit Weighted Round Robin for QoS Support in IP Networks.
J. Circuits Syst. Comput., 2013

2012
Design and performance analysis of a zonal DCT-based image encoder for Wireless Camera Sensor Networks.
Microelectron. J., 2012

Low power hardware-based image compression solution for wireless camera sensor networks.
Comput. Stand. Interfaces, 2012

2011
Ultra Compact Non-volatile Flip-Flop for Low Power Digital Circuits Based on Hybrid CMOS/Magnetic Technology.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011

Hybrid CMOS/Magnetic Process Design Kit and application to the design of high-performances non-volatile logic circuits.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011

2010
Performance evaluation of MIC@R NoC for real-time applications.
Int. J. Comput. Aided Eng. Technol., 2010

Efficient hardware solution for low power and adaptive image-compression in WSN.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Design platform and tools for 3D IC integration.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009
Automated Breast Cancer Diagnosis Based on GVF-Snake Segmentation, Wavelet Features Extraction and Fuzzy Classification.
J. Signal Process. Syst., 2009

Infrastructures for Education, Research and Industry in Microelectronics A Look Worldwide and a Look at India.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2001
TCP flow control technique for an interworking interface: hardware implementation.
Comput. Stand. Interfaces, 2001

CMP: The Access to Advanced Low Costy Manufacturing.
Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001

2000
Design of New Optimized Architecture Processor for DWT.
Real Time Imaging, 2000

VLSI design of 1-D DWT architecture with parallel filters.
Integr., 2000

IDDQ Testing of Submicron CMOS - by Cooling?
J. Electron. Test., 2000

1999
Advanced Low Cost Manufacturing From CMP Service.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 1999

1991
Silicon compilation of hierarchical control sections with unified BIST testability.
Microprocess. Microsystems, 1991

A self-checking PLA automatic generator tool based on unordered codes encoding.
Proceedings of the conference on European design automation, 1991

1990
Étude d'une stratégie d'autotest intégré pour le compilateur de silicium SYCO. (Built-in self-test strategy study for the SYCO silicon compiler).
PhD thesis, 1990

1988
UBIST version of the SYCO's control section compiler.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988


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