Bernard Courtois

According to our database1, Bernard Courtois authored at least 87 papers between 1975 and 2019.

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Bibliography

2019
Special Session (New Topic): Emerging Computing and Testing Techniques.
Proceedings of the 37th IEEE VLSI Test Symposium, 2019

2018
Special session on quantum systems: Next challenges in design, test, integration.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

2014
Special Section NANOTECH 2013.
Microelectron. J., 2014

New topic session 7B: Challenges and opportunities in test and design for test (DFT) of MEMS sensors.
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

New topic session 2B: Co-design and reliability of power electronic modules - Current status and future challenges.
Proceedings of the 32nd IEEE VLSI Test Symposium, 2014

2013
New topic session 2B: Why (Re-)Designing Biology is ∗Slightly∗ more challenging than designing electronics.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013

New topic session 7B: Challenges and directions for ultra-low voltage VLSI circuits and systems: CMOS and beyond.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Panel: the heritage of Mead & Conway: what has remained the same, what was missed, what has changed, what lies ahead.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Special section NANOTECH 2011.
Microelectron. J., 2012

2010
ICs and MEMS for energy management.
Proceedings of the 11th Latin American Test Workshop, 2010

2009
European Nano Systems 2007.
Microelectron. J., 2009

Special Session 8: New Topics: At-Speed Testing in the Face of Process Variations.
Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Microscale and Nanoscale Thermal Characterization of Integrated Circuit Chips.
Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Infrastructures for Education, Research and Industry in Microelectronics A Look Worldwide and a Look at India.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2008
European Nano Systems 2006.
Microelectron. J., 2008

2007
Characterisation of the Etching Quality in Micro-Electro-Mechanical Systems by Thermal Transient Methodology
CoRR, 2007

Heterogeneous systems on chip and systems in package.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Session Abstract.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

2005
Special issue on European Micro and Nano Systems (EMN04) held in Paris, 20-21 October, 2004.
Microelectron. J., 2005

2004
On-chip testing of embedded transducers.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

On-chip testing of embedded silicon transducers.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

Infrastructures for Education, Research and Industry in Microelectronics - A review.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004

2003
Infrastrukturen für Forschung und Lehre: von nationalen Initiativen zu weltweiten Entwicklungen.
it Inf. Technol., 2003

2001
Generation of Electrically Induced Stimuli for MEMS Self-Test.
J. Electron. Test., 2001

Electrically Induced Stimuli For MEMS Self-Test.
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

CMP: The Access to Advanced Low Costy Manufacturing.
Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001

An Analog-based Approach for MEMS Testing.
Proceedings of the 2nd Latin American Test Workshop, 2001

2000
Design of self-checking fully differential circuits and boards.
IEEE Trans. Very Large Scale Integr. Syst., 2000

Analog ALC crystal oscillators for high-temperature applications.
IEEE J. Solid State Circuits, 2000

IDDQ Testing of Submicron CMOS - by Cooling?
J. Electron. Test., 2000

Extending Fault-Based Testing to Microelectromechanical Systems.
J. Electron. Test., 2000

Towards design and validation of mixed-technology SOCs.
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

1999
Guest Editors' Introduction.
IEEE Des. Test Comput., 1999

Design and Test of MEMs.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Advanced Low Cost Manufacturing From CMP Service.
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 1999

Fault modeling of suspended thermal MEMS.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998
A Reliable Fail-Safe System.
IEEE Trans. Computers, 1998

Thermal Monitoring of Self-Checking Systems.
J. Electron. Test., 1998

Tracing the Thermal Behavior of ICs.
IEEE Des. Test Comput., 1998

Failure mechanisms and fault classes for CMOS-compatible microelectromechanical systems.
Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

3D CMOS SOL for high performance computing.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

Microsystems Testing: an Approach and Open Problems.
Proceedings of the 1998 Design, 1998

1997
CAD Tools for Bridging Microsystems and Foundries.
IEEE Des. Test Comput., 1997

Integrating on-chip temperature sensors into DfT schemes and BIST architectures.
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

Generation of the HDL-A-model of a micromembrane from its finite-element-description.
Proceedings of the European Design and Test Conference, 1997

CAD and Foundries for Microsystems.
Proceedings of the 34st Conference on Design Automation, 1997

1996
Unified built-in self-test for fully differential analog circuits.
J. Electron. Test., 1996

Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets.
J. Electron. Test., 1996

Guest editorial.
J. Electron. Test., 1996

Guest Editors' Introduction: Mixed Analog and Digital Systems.
IEEE Des. Test Comput., 1996

Second Therminic Workshop.
IEEE Des. Test Comput., 1996

Automatic Test Generation for Maximal Diagnosis of Linear Analogue Circuits.
Proceedings of the 1996 European Design and Test Conference, 1996

Applied design and analysis of microsystems.
Proceedings of the 1996 European Design and Test Conference, 1996

High level CAD melds microsystems with foundries.
Proceedings of the 1996 European Design and Test Conference, 1996

Thermal Monitoring Of Safety-Critical Integrated Systems.
Proceedings of the 5th Asian Test Symposium (ATS '96), 1996

1995
Analog checkers with absolute and relative tolerances.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.
IEEE Trans. Computers, 1995

Conference Reports.
IEEE Des. Test Comput., 1995

Frequency-based BIST for analog circuit testin.
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Mixed-signal circuits and boards for high safety applications.
Proceedings of the 1995 European Design and Test Conference, 1995

Panel: New Research Problems in the Emerging Test Technology.
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1994
Designing self-exercising analogue checkers.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Built-in self-test and fault diagnosis of fully differential analogue circuits.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
Quiescent Current Monitoring to Improve the Reliability of Electronic Systems in Space Radiation Environments.
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

1992
Towards System level modeling and synthesis.
Proceedings of the Fifth International Conference on VLSI Design, 1992

On the Design of Self-Checking Boundary Scannable Boards.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

Generation of Vector Patterns Through Reseeding of Multipe-Polynominal Linear Feedback Shift Registers.
Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

1991
Silicon compilation of hierarchical control sections with unified BIST testability.
Microprocess. Microsystems, 1991

Coupling Electron-Beam Probing with Knowledge-Based Fault Localization.
Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

Built-In Self-Test for Multi-Port RAMs.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990
Robust tests for stuck-open faults and design for testability of reconvergent fan-out CMOS logic networks.
Proceedings of the European Design Automation Conference, 1990

NAUTILE: a safe environment for silicon compilation.
Proceedings of the European Design Automation Conference, 1990

1989
Random Pattern Testing Versus Deterministic Testing of RAM's.
IEEE Trans. Computers, 1989

Self-checking logic arrays.
Microprocess. Microsystems, 1989

A generalized theory of fail-safe systems.
Proceedings of the Nineteenth International Symposium on Fault-Tolerant Computing, 1989

1988
Strongly Code Disjoint Checkers.
IEEE Trans. Computers, 1988

Definition and Design of Strongly Language Disjoint Checkers.
IEEE Trans. Computers, 1988

Fault Simulation and Test Pattern Generation at the Multiple-Valued Switch Level.
Proceedings of the Proceedings International Test Conference 1988, 1988

UBIST version of the SYCO's control section compiler.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1986
Scanning the issue.
Proc. IEEE, 1986

Towards Automatic Failure Analysis of Complex ICs Through E-Beam Testing.
Proceedings of the Proceedings International Test Conference 1986, 1986

Principles of the SYCO compiler.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1984
Functional testing vs. structural testing of RAMs.
Proceedings of the Fehlertolerierende Rechensysteme, 1984

1983
A new domain for image analysis: VLSI circuits testing, with Romuald, specialized in parallel image processing.
Pattern Recognit. Lett., 1983

1981
Analytical Testing of Data Processing Sections of Integrated CPUs.
Proceedings of the Proceedings International Test Conference 1981, 1981

1976
Etude d'un calculateur tolérant des pannes, ses fiabilité, sécurité, performance et coût.
PhD thesis, 1976

1975
On balancing hardware-firmware for designing a fault-tolerant computers' series.
Proceedings of the 8th annual workshop on Microprogramming, 1975


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