Khurram Waheed

According to our database1, Khurram Waheed authored at least 26 papers between 2002 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2015
Design of Spur-Free ΣΔ Frequency Tuning Interface for Digitally Controlled Oscillators.
IEEE Trans. on Circuits and Systems, 2015

2011
Spurious-Free Time-to-Digital Conversion in an ADPLL Using Short Dithering Sequences.
IEEE Trans. on Circuits and Systems, 2011

Spur-Free Multirate All-Digital PLL for Mobile Phones in 65 nm CMOS.
J. Solid-State Circuits, 2011

Spur-free all-digital PLL in 65nm for mobile phones.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
Optimal Spacing of a Linearly Interpolated Complex-Gain LUT Predistorter.
IEEE Trans. Vehicular Technology, 2010

A Technique to Reduce Phase/Frequency Modulation Bandwidth in a Polar RF Transmitter.
IEEE Trans. on Circuits and Systems, 2010

Efficient Lookup Table-Based Adaptive Baseband Predistortion Architecture for Memoryless Nonlinearity.
EURASIP J. Adv. Sig. Proc., 2010

A 0.8mm2 all-digital SAW-less polar transmitter in 65nm EDGE SoC.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

Softransceiver transmit origin offset compensation: Digital to the rescue of RF-CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Spurious free time-to-digital conversion in an ADPLL using short dithering sequences.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
Enabling GSM/GPRS/EDGE EVM testing on low cost multi-site testers.
Proceedings of the 2009 IEEE International Test Conference, 2009

Quantization Noise Improvement of Time to Digital Converter (TDC) for ADPLL.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

Curse of digital polar transmission: Precise delay alignment in amplitude and phase modulation paths.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Mitigation of CMOS device variability in the transmitter amplitude path using Digital RF Processing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Efficient spacing scheme for a linearly interpolated lookup table predistorter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Injection Spurs due to Reference Frequency Retiming by a Channel Dependent Clock at the ADPLL RF Output and its Mitigation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Digital RF Processing Techniques for Device Mismatch Tolerant Transmitters in Nanometer-Scale CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
Blind information-theoretic multiuser detection algorithms for DS-CDMA and WCDMA downlink systems.
IEEE Trans. Neural Networks, 2005

Linear State Space Feedforward and Feedback Structures for Blind Source Recovery in Dynamic Environments.
Neural Processing Letters, 2005

Blind Source Recovery in a State-Space Famework: Algorithms for Static and Dynamic Environments.
Neural Processing Letters, 2005

Characterization of deep-submicron varactor mismatches in a digitally controlled oscillator.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
Blind source recovery for non-minimum phase surroundings.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
Blind Source Recovery: A Framework in the State Space.
J. Mach. Learn. Res., 2003

New hyperbolic source density models for blind source recovery score functions.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
State space blind source recovery for mixtures of multiple source distributions.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002


  Loading...