# Khurram Muhammad

According to our database

Collaborative distances:

^{1}, Khurram Muhammad authored at least 50 papers between 1995 and 2020.Collaborative distances:

## Timeline

#### Legend:

Book In proceedings Article PhD thesis Other## Links

#### On csauthors.net:

## Bibliography

2020

Proceedings of the 2020 IEEE Wireless Communications and Networking Conference Workshops, 2020

2013

An adaptive predistorter for wireless LAN RFSoC with embedded PA and T/R switch in 55nm CMOS.

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2010

Software Assisted Digital RF Processor (DRP™) for Single-Chip GSM Radio in 90 nm CMOS.

IEEE J. Solid State Circuits, 2010

2009

IEEE Trans. Circuits Syst. II Express Briefs, 2009

2008

A 24mm<sup>2</sup> Quad-Band Single-Chip GSM Radio with Transmitter Calibration in 90nm Digital CMOS.

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007

IEEE Trans. Signal Process., 2007

IEEE Trans. Circuits Syst. II Express Briefs, 2007

IEEE J. Solid State Circuits, 2007

Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006

IEEE Trans. Very Large Scale Integr. Syst., 2006

IEEE Trans. Circuits Syst. II Express Briefs, 2006

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

A Sigma-Delta ADC with Decimation and Gain Control Function for a Bluetooth Receiver in 130 nm Digital CMOS.

EURASIP J. Wirel. Commun. Netw., 2006

Charge-Domain Signal Processing of Direct RF Sampling Mixer with Discrete-Time Filters in Bluetooth and GSM Receivers.

EURASIP J. Wirel. Commun. Netw., 2006

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005

IEEE Commun. Mag., 2005

Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

Complexity reduction of digital filters using shift inclusive differential coefficients.

IEEE Trans. Signal Process., 2004

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A sigma-delta ADC with a built-in anti-aliasing filter for Bluetooth receiver in 130nm digital process.

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

IEEE Trans. Very Large Scale Integr. Syst., 2003

Two's complement computation sharing multiplier and its applications to high performance DFE.

IEEE Trans. Signal Process., 2003

MRPF: An Architectural Transformation for Synthesis of High-Performance and Low-Power Digital Filters.

Proceedings of the 2003 Design, 2003

2002

Reduced computational redundancy implementation of DSP algorithms using computation sharing vector scaling.

IEEE Trans. Very Large Scale Integr. Syst., 2002

A graph theoretic approach for synthesizing very low-complexityhigh-speed digital filters.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

2001

Signal Strength Based Switching Activity Modeling and Estimation for DSP Applications.

VLSI Design, 2001

Speed, power, area, and latency tradeoffs in adaptive FIR filtering for PRML read channels.

IEEE Trans. Very Large Scale Integr. Syst., 2001

A novel approach to high-level switching activity modeling with applications to low-power DSP system synthesis.

IEEE Trans. Signal Process., 2001

IEEE Des. Test Comput., 2001

Decision feedback equalizer with two's complement computation sharing multiplication.

Proceedings of the IEEE International Conference on Acoustics, 2001

Proceedings of the IEEE International Conference on Acoustics, 2001

Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels.

Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Proceedings of the IEEE International Conference on Acoustics, 2000

Minimally redundant parallel implementation of digital filters and vector scaling.

Proceedings of the IEEE International Conference on Acoustics, 2000

1999

A Graph Theoretic Approach for Design and Synthesis of Multiplierless FIR Filters.

Proceedings of the 12th International Symposium on System Synthesis, 1999

Switching Characteristics of Generalized Array Multiplier Architectures and their Applications to Low Power Design.

Proceedings of the IEEE International Conference On Computer Design, 1999

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

High-level modeling of switching activity with application to low-power DSP system synthesis.

Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1997

IEEE J. Sel. Areas Commun., 1997

On Complexity Reduction of FIR Digital Filters Using Constrained Least Squares Solution.

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1995

On the performance of sequential and Viterbi decoders for high-rate punctured convolutional codes.

IEEE Trans. Commun., 1995

An efficient new technique for accurate bit error probability estimation of ZJ decoders.

IEEE Trans. Commun., 1995