Kiseok Lee
Orcid: 0009-0006-4587-2357
According to our database1,
Kiseok Lee authored at least 5 papers
between 2020 and 2026.
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Bibliography
2026
System-Technology Co-Optimization of Bitline Routing and Bonding Pathways in Monolithic 3D DRAM Architectures.
CoRR, March, 2026
2024
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
Effect of Back Gate on Word Line Disturb Immunity of a Vertical Channel DRAM Cell Array Transistor.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
2021
Fault Coverage Re-Evaluation of Memory Test Algorithms With Physical Memory Characteristics.
IEEE Access, 2021
2020
Chebyshev collocation method for the constant mobility Cahn-Hilliard equation in a square domain.
Appl. Math. Comput., 2020