Koji Horisaki

According to our database1, Koji Horisaki authored at least 5 papers between 2011 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
A Standard-Cell Based On-Chip NMOS and PMOS Performance Monitor for Process Variability Compensation.
IEICE Trans. Electron., 2013

2012
An area-efficient, standard-cell based on-chip NMOS and PMOS performance monitor for process variability compensation.
Proceedings of the 2012 IEEE Symposium on Low-Power and High-Speed Chips, 2012

2011
High-Throughput, Low-Power Software-Defined Radio Using Reconfigurable Processors.
IEEE Micro, 2011

A multimodal wireless baseband core using a coarse-grained dynamic reconfigurable processor.
Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011

A 7uW deep-sleep, ultra low-power WLAN baseband LSI for mobile applications.
Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011


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