Kripesh Vaidyanathan

According to our database, Kripesh Vaidyanathan authored at least 5 papers between 2002 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

Design, assembly and reliability of large die and fine-pitch Cu/low-k flip chip package.

Yue Ying Ong, Soon Wee Ho, Kripesh Vaidyanathan, Vasarla Nagendra Sekhar, Ming Chinq Jong, Samuel Lim Yak Long, Vincent Lee Wen Sheng, Leong Ching Wai, Vempati Srinivasa Rao, Jimmy Ong, Xuefen Ong, Xiaowu Zhang, Yoon Uk Seung, John H. Lau, Yeow Kheng Lim, David Yeo, Kai Chong Chan, Yanfeng Zhang, Juan Boon Tan, Dong Kyun Sohn

Microelectron. Reliab., 2010

2009

Underfill selection methodology for fine pitch Cu/low-k FCBGA packages.

Xuefen Ong, Soon Wee Ho, Yue Ying Ong, Leong Ching Wai, Kripesh Vaidyanathan, Yeow Kheng Lim, David Yeo, Kai Chong Chan, Juan Boon Tan, Dong Kyun Sohn, Liang Choo Hsia, Zhong Chen

Microelectron. Reliab., 2009

2008

Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP).

Xiaowu Zhang, Kripesh Vaidyanathan, Tai Chong Chai, Teck Chun Tan, D. Pinjala

Microelectron. Reliab., 2008

2006

Development of bulk nanostructured copper with superior hardness for use as an interconnect material in electronic packaging.

M. Y. Pan, Manoj Gupta, Andrew A. O. Tay, Kripesh Vaidyanathan

Microelectron. Reliab., 2006

2002

Reliability of Wire Bonding on Low-k Dielectric Material in Damascene Copper Integrated Circuits PBGA Assembly.

Mohandass Sivakumar, Kripesh Vaidyanathan, Chong Ser Choong, Tai Chong Chai, Loon Aik Lim

Microelectron. Reliab., 2002