Xiaowu Zhang

According to our database1, Xiaowu Zhang authored at least 17 papers between 2004 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
Optimal design of three-planetary-gear power-split hybrid powertrains.
CoRR, 2017

2016
Design of Multimode Power-Split Hybrid Vehicles - A Case Study on the Voltec Powertrain System.
IEEE Trans. Vehicular Technology, 2016

Fuel-Saving Cruising Strategies for Parallel HEVs.
IEEE Trans. Vehicular Technology, 2016

Reliability study of 3D IC packaging based on through-silicon interposer (TSI) and silicon-less interconnection technology (SLIT) using finite element analysis.
Microelectronics Reliability, 2016

2015
Fuel-Optimal Cruising Strategy for Road Vehicles With Step-Gear Mechanical Transmission.
IEEE Trans. Intelligent Transportation Systems, 2015

A Near-Optimal Power Management Strategy for Rapid Component Sizing of Multimode Power Split Hybrid Vehicles.
IEEE Trans. Contr. Sys. Techn., 2015

Heat Dissipation Capability of a Package-on-Package Embedded Wafer-Level Package.
IEEE Design & Test, 2015

2013
A near-optimal power management strategy for rapid component sizing of power split hybrid vehicles with multiple operating modes.
Proceedings of the American Control Conference, 2013

2012
Prius+ and Volt-: Configuration Analysis of Power-Split Hybrid Vehicles With a Single Planetary Gear.
IEEE Trans. Vehicular Technology, 2012

Modular sensor chip design for package stress evaluation and reliability characterisation.
Microelectronics Reliability, 2012

2011
A low stress bond pad design optimization of low temperature solder interconnections on TSVs for MEMS applications.
Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010
Electromigration performance of Through Silicon Via (TSV) - A modeling approach.
Microelectronics Reliability, 2010

Design, assembly and reliability of large die and fine-pitch Cu/low-k flip chip package.
Microelectronics Reliability, 2010

2009
Mapping the failure envelope of board-level solder joints.
Microelectronics Reliability, 2009

2008
Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP).
Microelectronics Reliability, 2008

2005
Development of process modeling methodology for flip chip on flex interconnections with non-conductive adhesives.
Microelectronics Reliability, 2005

2004
Thermo-mechanical finite element analysis in a multichip build up substrate based package design.
Microelectronics Reliability, 2004


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