Kyoungmin Koh

According to our database1, Kyoungmin Koh authored at least 9 papers between 2010 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2025
Mitigation of Vertical Fixed Pattern Noise in CMOS Image Sensors through Analog Offset Dithering and Dynamic Clock Adjustment.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2023
A 1/1.12-inch $1.4\mu\mathrm{m}$-Pitch 50Mpixel 65/28nm Stacked CMOS Image Sensor using Mulitple Sampling.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

A Low Power Digitizer with Piecewise- Linear Counting Technique for High Dynamic Range Nonacell-Based 3-D-Stacked CMOS Image Sensor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A 1/1.33-inch 108Mpixel CMOS Image Sensor with 0.8um unit NONACELL pixels.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 0.7 μm-Pitch 108 Mpixel Nonacell-Based CMOS Image Sensor with Decision-Feedback Technique.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
A 4-tap 3.5 μm 1.2 Mpixel Indirect Time-of-Flight CMOS Image Sensor with Peak Current Mitigation and Multi-User Interference Cancellation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
5.5 A 2.1e<sup>-</sup> Temporal Noise and -105dB Parasitic Light Sensitivity Backside-Illuminated 2.3µm-Pixel Voltage-Domain Global Shutter CMOS Image Sensor Using High-Capacity DRAM Capacitor Technology.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

A 1/3-Inch 1.12μm-Pitch 13Mpixel CMOS Image Sensor with a Low-Power Readout Architecture.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2010
A 1.1e- temporal noise 1/3.2-inch 8Mpixel CMOS image sensor using pseudo-multiple sampling.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010


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