Kyung Ki Kim

Proceedings of the International Conference on Electronics, Information, and Communication, 2024

2023

Optimizing Image Classification with Inverse Depthwise Separable Convolution for Edge Devices.

[BibT_eX]

[DOI]

Akshay Kumar Sharma

Proceedings of the 20th International SoC Design Conference, 2023

Efficient Object Detection through Migration-Based Neural Architecture Search.

[BibT_eX]

[DOI]

Proceedings of the 20th International SoC Design Conference, 2023

Modeling Truncation-Based Approximation Error in Stochastic Computing Circuits.

[BibT_eX]

[DOI]

Keerthana Pamidimukkala

Proceedings of the 20th International SoC Design Conference, 2023

2022

Search-Efficient NAS: Neural Architecture Search for Classification.

[BibT_eX]

[DOI]

Proceedings of the 19th International SoC Design Conference, 2022

Time-Efficient Approximate Stochastic Computing for Medical Imaging Applications.

[BibT_eX]

[DOI]

Keerthana Pamidimukkala

Proceedings of the 19th International SoC Design Conference, 2022

A Time-Domain Parallel Counter for Deep Learning Macro.

[BibT_eX]

[DOI]

Proceedings of the 19th International SoC Design Conference, 2022

A Lightweight Detector for Small Objects.

[BibT_eX]

[DOI]

Akshay Kumar Sharma

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

LightNet: A Lightweight Neural Network for Image Classification.

[BibT_eX]

[DOI]

Akshay Kumar Sharma

Byungho Kang

Proceedings of the 18th International SoC Design Conference, 2021

FPGA-based Scalable Road Image Stochastic Denosing Approach.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

Stochastic Edge Detection for Fine-Grained Progressive Precision.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

A Time-Domain Computing-In-Memory Micro using Ring Oscillator.

[BibT_eX]

[DOI]

Proceedings of the 18th International SoC Design Conference, 2021

2020

A Lightweight DNN for ECG Image Classification.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2020

Gate Diffusion Input Multi-Threshold Null Convention Logic Circuit Design Approach.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2020

An Ultra-Low-Power Tunable Bump Circuit using Source-Degenerated Differential Transconductor.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2020

Peak Current Control Boost Converter with Time-Multiplex.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2020

2019

ECG Heartbeat Classification Using a Single Layer LSTM Model.

[BibT_eX]

[DOI]

Proceedings of the 2019 International SoC Design Conference, 2019

Area Efficient Multi-Threshold Null Convenction Logic.

[BibT_eX]

[DOI]

Proceedings of the 2019 International SoC Design Conference, 2019

Optimization of Null Convenction Logic Using Gate Diffusion Input.

[BibT_eX]

[DOI]

Proceedings of the 2019 International SoC Design Conference, 2019

Standing Wave Oscillator Based Clock Distribution Minimizing Equivalent Capacitance for Process and Temperature variation.

[BibT_eX]

[DOI]

Gyunam Jeon

Proceedings of the 2019 International SoC Design Conference, 2019

Evaluations of Electronic Neuron Model for Low Power VLSI Implementation.

[BibT_eX]

[DOI]

Yixuan He

Proceedings of the 2019 International SoC Design Conference, 2019

GPU Architecture Optimization For Mobile Computing.

[BibT_eX]

[DOI]

Abdulsami Aldahlawi

Yang-Bin Kim

Proceedings of the 2019 International SoC Design Conference, 2019

2018

Generalized Adaptive Variable Bit Truncation Method for Approximate Stochastic Computing.

[BibT_eX]

[DOI]

Keerthana Pamidimukkala

Proceedings of the International SoC Design Conference, 2018

Low-Power Null Convention Logic Multiplier Design Based On Gate Diffusion Input Technique.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2018

2017

Fully Integrated on-Chip Switched DC-DC Converter for Battery-Powered Mixed-Signal SoCs.

[BibT_eX]

[DOI]

HeungJun Jeon

Symmetry, 2017

Low power asynchronous circuit design methodology using a new Single Gate Sleep Convention Logic (SG-SCL).

[BibT_eX]

[DOI]

Jin-Kyung Lee

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Variable bit truncation technique for approximate stochastic computing (ASC).

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2017

Cooperation of multi robots for disaster rescue.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2017

Clothing-based wearable sensors for unobtrusive interactions with mobile devices.

[BibT_eX]

[DOI]

Vijayakumar Nanjappan

Proceedings of the International SoC Design Conference, 2017

Low-power null convention logic design based on modified gate diffusion input technique.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2017

Time-domain temperature sensor based on interlaced hysteresis delay cells.

[BibT_eX]

[DOI]

Yun Seok Hong

Proceedings of the International SoC Design Conference, 2017

2016

An Area Efficient 4Gb/s Half-Rate 3-Tap DFE with Current-Integrating Summer for Data Correction.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE North Atlantic Test Workshop, 2016

A flexible software defined radio-based UHF RFID reader based on the USRP and LabView.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2016

Approximate stochastic computing (ASC) for image processing applications.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2016

Parallel decoding for multi-stage BCH decoder.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2016

Hybrid GDI-NCL for area/power reduction.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2016

2014

Full custom implementation of a S-Box circuit architecture using power gated PLA structure.

[BibT_eX]

[DOI]

Ho Joon Lee

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013

Power switch implementation for low voltage digital circuits.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2013

2012

On-chip HBD sensor for nanoscale CMOS technology.

[BibT_eX]

[DOI]

Ho Joon Lee

Siva Pavan Kumar Kotipalli

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

Design and evaluation of Side Channel Attack resistant asynchronous AES Round Function.

[BibT_eX]

[DOI]

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

All-digital phased-locked loop with local passive interpolation time-to-digital converter based on a tristate inverter.

[BibT_eX]

[DOI]

Moon Seok Kim

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A novel 4-to-3 step-down on-chip SC DC-DC converter with reduced bottom-plate loss.

[BibT_eX]

[DOI]

HeungJun Jeon

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A design and integration of Parametric Measurement Unit on to a 600MHz DCL.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2012

A loosely-coupled binding model for Wireless Sensor Networks.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2012

2011

Dynamic Voltage and Frequency Scaling for Power- Constrained Design using Process Voltage and Temperature Sensor Circuits.

[BibT_eX]

[DOI]

J. Inf. Process. Syst., 2011

Analysis of time dependent dielectric breakdown in nanoscale CMOS circuits.

[BibT_eX]

[DOI]

Ho Joon Lee

Proceedings of the International SoC Design Conference, 2011

A design approach of a Parametric Measurement Unit on to a 600MHz DCL.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2011

Adaptive Power Management for Nanoscale SoC Design.

[BibT_eX]

[DOI]

Jeong-Tak Ryu

Proceedings of the Communication and Networking, 2011

2010

On-Chip Aging Sensor Circuits for Reliable Nanometer MOSFET Digital Circuits.

[BibT_eX]

[DOI]

Wei Wang

IEEE Trans. Circuits Syst. II Express Briefs, 2010

Hybrid MOSFET/CNFET based power gating structure.

[BibT_eX]

[DOI]

Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Adaptive HCI-aware power gating structure.

[BibT_eX]

[DOI]

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Power gating for ultra-low voltage nanometer ICs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

A Novel Adaptive Design Methodology for Minimum Leakage Power Considering PVT Variations on Nanoscale VLSI Systems.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2009

A Novel Statistical Timing and Leakage Power Characterization of Partially Depleted Silicon-on-Insulator Gates.

[BibT_eX]

[DOI]

Fabrizio Lombardi

IEEE Trans. Instrum. Meas., 2009

Ultralow-Voltage Power Gating Structure Using Low Threshold Voltage.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2009

2008

Analysis and Simulation of Jitter Sequences for Testing Serial Data Channels.

[BibT_eX]

[DOI]

IEEE Trans. Ind. Informatics, 2008

Standby power reduction using optimal supply voltage and body-bias voltage.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2008

2007

Low power CMOS electronic central pattern generator design for a biomimetic underwater robot.

[BibT_eX]

[DOI]

Neurocomputing, 2007

Ultra-low voltage high-speed Schmitt trigger circuit in SOI MOSFET technology.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2007

Modeling and analysis of inter-symbol interference (ISI) jitter.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2007

Leakage Minimization Technique for Nanoscale CMOS VLSI.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

A CMOS Low Power Fully Digital Adaptive Power Delivery System Based on Finite State Machine Control.

[BibT_eX]

[DOI]

James T. Doyle

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Optimal Body Biasing for Minimum Leakage Power in Standby Mode.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005

Data Dependent Jitter (DDJ) Characterization Methodology.

[BibT_eX]

[DOI]