Lan Gao

According to our database1, Lan Gao authored at least 35 papers between 2003 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
An Event-Triggered Approach for Gradient Tracking in Consensus-Based Distributed Optimization.
IEEE Trans. Netw. Sci. Eng., 2022

2021
Differentially Private Consensus With Quantized Communication.
IEEE Trans. Cybern., 2021

Robust Finite-Time Dynamic Average Consensus With Exponential Convergence Rates.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Full-Wave Modeling and Inversion of UWB Radar Data for Wave Propagation in Cylindrical Objects.
Remote. Sens., 2021

2020
Thread-Level Locking for SIMT Architectures.
IEEE Trans. Parallel Distributed Syst., 2020

Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
IEEE Trans. Computers, 2020

Multi-dimensional optimization for approximate near-threshold computing.
Frontiers Inf. Technol. Electron. Eng., 2020

Compressing LSTM Networks by Matrix Product Operators.
CoRR, 2020

2019
Differentially Private Consensus With an Event-Triggered Mechanism.
IEEE Trans. Control. Netw. Syst., 2019

Accelerating in-memory transaction processing using general purpose graphics processing units.
Future Gener. Comput. Syst., 2019

Distributed Secondary Voltage Control of Islanded Microgrids Based on RBF-Neural-Network Sliding-Mode Technique.
IEEE Access, 2019

Multiple Algorithms Against Multiple Hardware Architectures: Data-Driven Exploration on Deep Convolution Neural Network.
Proceedings of the Network and Parallel Computing, 2019

Enabling Energy-Efficient and Reliable Neural Network via Neuron-Level Voltage Scaling.
Proceedings of the 25th IEEE International Conference on Parallel and Distributed Systems, 2019

Towards a General and Efficient Linked-List Hash Table on GPUs.
Proceedings of the 21st IEEE International Conference on High Performance Computing and Communications; 17th IEEE International Conference on Smart City; 5th IEEE International Conference on Data Science and Systems, 2019

"I Bought This for Me to Look More Ordinary": A Study of Blind People Doing Online Shopping.
Proceedings of the 2019 CHI Conference on Human Factors in Computing Systems, 2019

2018
SRAM- and STT-RAM-based hybrid, shared last-level cache for on-chip CPU-GPU heterogeneous architectures.
J. Supercomput., 2018

2017
Event-triggered consensus for multi-agent networks with switching topology under quantized communication.
Neurocomputing, 2017

2016
Event-Triggered Distributed Average Consensus Over Directed Digital Networks With Limited Communication Bandwidth.
IEEE Trans. Cybern., 2016

Augmented state GM-PHD filter with registration errors for multi-target tracking by Doppler radars.
Signal Process., 2016

GM-PHD filter-based multi-target tracking in the presence of Doppler blind zone.
Digit. Signal Process., 2016

Scheduling Tasks with Mixed Timing Constraints in GPU-Powered Real-Time Systems.
Proceedings of the 2016 International Conference on Supercomputing, 2016

Lock-based synchronization for GPU architectures.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015
Research on the Application of an Improved Shortest Path Algorithmin Public Transport System.
Proceedings of the 10th International Conference on Broadband and Wireless Computing, 2015

2014
Pinning Controllability Analysis of Complex Networks With a Distributed Event-Triggered Mechanism.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

Formal and relational governance in IT outsourcing: substitution, complementarity and the role of the psychological contract.
Inf. Syst. J., 2014

Software Transactional Memory for GPU Architectures.
Proceedings of the 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014

2010
A low-cost memory remapping scheme for address bus protection.
J. Parallel Distributed Comput., 2010

2009
Supporting flexible streaming media protection through privacy-aware secure processors.
Comput. Electr. Eng., 2009

2008
Prediction of Vessel Traffic Accident Based on Chaotic Theory.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

2006
Efficient Group KeyManagement with Tamper-resistant ISA Extensions.
Proceedings of the 2006 IEEE International Conference on Application-Specific Systems, 2006

A low-cost memory remapping scheme for address bus protection.
Proceedings of the 15th International Conference on Parallel Architectures and Compilation Techniques (PACT 2006), 2006

2005
Improving Memory Encryption Performance in Secure Processors.
IEEE Trans. Computers, 2005

Architectural support for protecting user privacy on trusted processors.
SIGARCH Comput. Archit. News, 2005

SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors.
Proceedings of the 11th International Conference on High-Performance Computer Architecture (HPCA-11 2005), 2005

2003
Fast Secure Processor for Inhibiting Software Piracy and Tampering.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003


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