Leonardo Juracy

According to our database, Leonardo Juracy authored at least 17 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A Comprehensive Evaluation of Convolutional Hardware Accelerators.

Leonardo Rezende Juracy, Alexandre M. Amory, Fernando Moraes

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

From CNN to DNN Hardware Accelerators: A Survey on Design, Exploration, Simulation, and Frameworks.

Leonardo Rezende Juracy, Rafael Garibotti, Fernando Gehm Moraes

Found. Trends Electron. Des. Autom., 2023

Deploying Machine Learning in Resource-Constrained Devices for Human Activity Recognition.

Rafael Schild Reusch, Leonardo Rezende Juracy, Fernando Gehm Moraes

Proceedings of the XIII Brazilian Symposium on Computing Systems Engineering, 2023

2022

A Fast, Accurate, and Comprehensive PPA Estimation of Convolutional Hardware Accelerators.

Leonardo Rezende Juracy, Alexandre de Morais Amory, Fernando Gehm Moraes

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Assessment and Optimization of 1D CNN Model for Human Activity Recognition.

Rafael Schild Reusch, Leonardo Rezende Juracy, Fernando Gehm Moraes

Proceedings of the XII Brazilian Symposium on Computing Systems Engineering, 2022

2021

A High-Level Modeling Framework for Estimating Hardware Metrics of CNN Accelerators.

Leonardo Rezende Juracy, Matheus Trevisan Moreira, Alexandre de Morais Amory, Alexandre F. Hampel, Fernando Gehm Moraes

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators.

Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory, Fernando Gehm Moraes

Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

2020

A Survey of Aging Monitors and Reconfiguration Techniques.

Leonardo Rezende Juracy, Matheus Trevisan Moreira, Alexandre de Morais Amory, Fernando Gehm Moraes

CoRR, 2020

Test Oriented Design and Layout Generation of an Asynchronous Controller for the Blade Template.

Felipe A. Kuentzer, Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory

Proceedings of the 26th IEEE International Symposium on Asynchronous Circuits and Systems, 2020

2018

A DfT Insertion Methodology to Scannable Q-Flop Elements.

Leonardo Rezende Juracy, Matheus T. Moreira, Felipe A. Kuentzer, Alexandre M. Amory

IEEE Trans. Very Large Scale Integr. Syst., 2018

Testable Error Detection Logic Design Applied to an Asynchronous Timing Resilient Template.

Felipe A. Kuentzer, Leonardo Rezende Juracy, Matheus T. Moreira, Alexandre M. Amory

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

An LSSD Compliant Scan Cell for Flip-Flops.

Leonardo Rezende Juracy, Matheus T. Moreira, Felipe A. Kuentzer, Fernando Gehm Moraes, Alexandre M. Amory

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

On the reuse of timing resilient architecture for testing path delay faults in critical paths.

Felipe A. Kuentzer, Leonardo Rezende Juracy, Alexandre M. Amory

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

Optimized Design of an LSSD Scan Cell.

Leonardo Rezende Juracy, Matheus Trevisan Moreira, Felipe Augusto Kuentzer, Alexandre de Morais Amory

IEEE Trans. Very Large Scale Integr. Syst., 2017

XGT4: An industrial grade, open source tester for multi-gigabit networks.

Leonardo Rezende Juracy, Felipe B. Lazzarotto, Daniel V. Pigatto, Ney Laert Vilar Calazans, Fernando Gehm Moraes

Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

2014

A Fast Runtime Fault Recovery Approach for NoC-Based MPSoCS for Performance Constrained Applications.

Eduardo Wächter, Augusto Erichsen, Leonardo Juracy, Alexandre M. Amory, Fernando Gehm Moraes

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Runtime fault recovery protocol for NoC-based MPSoCs.

Eduardo Wächter, Augusto Erichsen, Leonardo Juracy, Alexandre M. Amory, Fernando Moraes

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014