Li Lun

According to our database, Li Lun authored at least 12 papers between 2023 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2026

DyNeuro: A Hybrid Neuromorphic Accelerator with Dynamic Spatio-Temporal Variation Adaptations.

Youming Yang, Yi Zhong, Li Lun, Tao Zhang, Xiaoxin Cui, Yuan Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

DualLearn: A 4.686pJ/SOP-4.026pJ/FLOP SNN-ANN Neuromorphic Inference-Training Processor with Distributed and Memory-Adaptive Architecture.

Yi Zhong, Zilin Wang, Zhaoxiang Zhang, Li Lun, Jinhao Ruan, Yipeng Gao, Yingying Cui, Xiaoxin Cui, Xing Zhang, Yuan Wang

Proceedings of the IEEE Custom Integrated Circuits Conference, 2026

2025

A Reconfigurable Digital Compute-in-Memory Architecture With 2:4 Compressed Weight Storage for Highly Sparse Fusion Neural Network.

Cheng Zhao, Li Lun, Zhenhui Dai, Tingting Zhong, Yi Zhong, Yingying Cui, Xiaoxin Cui

IEEE Trans. Circuits Syst. II Express Briefs, November, 2025

HyNITA: A Neuromorphic Inference and Training Accelerator for Hybrid ANN-SNN Fusion Models.

Yi Zhong, Li Lun, Zilin Wang, Jinhao Ruan, Yipeng Gao, Xiaoxin Cui, Xing Zhang, Yuan Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

A Reconfigurable Digital Compute-In-Memory Heterogeneous Macro for Differential Frame Convolution and Spiking Neural Network.

Cheng Zhao, Li Lun, Zhenhui Dai, Haozhe Chen, Yingying Cui, Xiaoxin Cui

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

CROSSCUT: A Multi-Core Neuromorphic Accelerator Improving Resource-Utilization.

Youming Yang, Yi Zhong, Zilin Wang, Tao Zhang, Li Lun, Yingying Cui, Xiaoxin Cui, Song Jia, Yuan Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Towards Effective and Sparse Adversarial Attack on Spiking Neural Networks via Breaking Invisible Surrogate Gradients.

Li Lun, Kunyu Feng, Qinglong Ni, Ling Liang, Yuan Wang, Ying Li, Dunshan Yu, Xiaoxin Cui

Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition, 2025

2024

NeuroREC: A 28-nm Efficient Neuromorphic Processor for Radar Emitter Classification.

Zilin Wang, Zehong Ou, Yi Zhong, Youming Yang, Li Lun, Hufei Li, Jian Cao, Xiaoxin Cui, Song Jia, Yuan Wang

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2024

A 16.41 TOPS/W CNN Accelerator with Event-Based Layer Fusion for Real-Time Inference.

Jiawei Wang, Li Lun, Zhenhui Dai, Yuanyuan Jiang, Xiaoxin Cui

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

SPAT: FPGA-based Sparsity-Optimized Spiking Neural Network Training Accelerator with Temporal Parallel Dataflow.

Yuanyuan Jiang, Li Lun, Jiawei Wang, Mingqi Yin, Hanqing Liu, Zhenhui Dai, Xiaole Cui, Xiaoxin Cui

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

An Efficient Spiking Convolutional Architecture with Compressed Address Event Representation and Adaptive Delay Asynchronous Clocks.

Zhenhui Dai, Li Lun, Zilin Wang, Jiawei Wang, Kunyu Feng, Yuan Wang, Dunshan Yu, Xiaoxin Cui

Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2024

2023

LRTransDet: A Real-Time SAR Ship-Detection Network with Lightweight ViT and Multi-Scale Feature Fusion.

Kunyu Feng, Li Lun, Xiaofeng Wang, Xiaoxin Cui

Remote. Sens., November, 2023