Xing Zhang
Affiliations:- Peking University, Institute of Microelectronics, Beijing, China
According to our database1,
Xing Zhang
authored at least 78 papers
between 2001 and 2022.
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Bibliography
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Single event transients induced by pulse laser in Ge pMOSFETs and its supply voltage dependence.
Sci. China Inf. Sci., 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 5th IEEE International Conference on Information Systems and Computer Aided Education, 2022
Proceedings of the International Conference on Advanced Robotics and Mechatronics , 2022
2021
Sci. China Inf. Sci., 2021
Proceedings of the RobCE 2021: 2021 International Conference on Robotics and Control Engineering, 2021
A High Linearity Process Angle Interference Resistant Multi-phase Output Digital Control Oscillator with Negative Feedback.
Proceedings of the RobCE 2021: 2021 International Conference on Robotics and Control Engineering, 2021
2020
The Research on Feature Extraction Method of ECG Signal Based on KPCA Dimension Reduction.
Proceedings of the ICMLC 2020: 2020 12th International Conference on Machine Learning and Computing, 2020
Proceedings of the ICMLC 2020: 2020 12th International Conference on Machine Learning and Computing, 2020
Proceedings of the AIAM2020: 2nd International Conference on Artificial Intelligence and Advanced Manufacture, 2020
2019
Improved turn-on behavior in a diode-triggered silicon-controlled rectifier for high-speed electrostatic discharge protection.
Sci. China Inf. Sci., 2019
Deep insight into the voltage amplification effect from ferroelectric negative capacitance.
Sci. China Inf. Sci., 2019
Unified Embedding Model over Heterogeneous Information Network for Personalized Recommendation.
Proceedings of the Twenty-Eighth International Joint Conference on Artificial Intelligence, 2019
2018
Knowl. Based Syst., 2018
Int. J. Circuit Theory Appl., 2018
Improvement of thermal stability of nickel germanide using nitrogen plasma pretreatment for germanium-based technology.
Sci. China Inf. Sci., 2018
GeC film with high substitutional carbon concentration formed by ion implantation and solid phase epitaxy for strained Ge n-MOSFETs.
Sci. China Inf. Sci., 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Investigation on the Gate Bias Voltage of BigFET in Power-rail ESD Clamp Circuit for Enhanced Transient Noise Immunity.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the IEEE International Conference on Data Mining, 2018
2017
Delay-locked loop based clock and data recovery with wide operating range and low jitter in a 65-nm CMOS process.
Int. J. Circuit Theory Appl., 2017
Power-Rail ESD Clamp Circuit with Parasitic-BJT and Channel Parallel Shunt Paths to Achieve Enhanced Robustness.
IEICE Trans. Electron., 2017
IEICE Electron. Express, 2017
Concurr. Comput. Pract. Exp., 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Power-rail ESD clamp circuit with hybrid-detection enhanced triggering in a 65-nm, 1.2-V CMOS process.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
Proceedings of the 12th IEEE International Conference on ASIC, 2017
2016
Int. J. Circuit Theory Appl., 2016
Optimization on Layout Strategy of Gate-Grounded NMOS for On-Chip ESD Protection in a 65-nm CMOS Process.
IEICE Trans. Electron., 2016
A PVT-independent Schmitt trigger with fully adjustable hysteresis threshold voltages for low-power 1-bit digitization applications.
IEICE Electron. Express, 2016
IEICE Electron. Express, 2016
Area-efficient transient power-rail electrostatic discharge clamp circuit with mis-triggering immunity in a 65-nm CMOS process.
Sci. China Inf. Sci., 2016
Design of a novel static-triggered power-rail ESD clamp circuit in a 65-nm CMOS process.
Sci. China Inf. Sci., 2016
Sci. China Inf. Sci., 2016
Delay-locked loop based frequency quadrupler with wide operating range and fast locking characteristics.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A novel low-leakage power-rail ESD clamp circuit with adjustable triggering voltage and superior false-triggering immunity for nanoscale applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
IEICE Trans. Electron., 2015
Investigation on the layout strategy of ggNMOS ESD protection devices for uniform conduction behavior and optimal width scaling.
Sci. China Inf. Sci., 2015
Sci. China Inf. Sci., 2015
Proceedings of the Security and Privacy in Communication Networks, 2015
180.5Mbps-8Gbps DLL-based clock and data recovery circuit with low jitter performance.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the Intelligent Computing Theories and Methodologies, 2015
Proceedings of the Cloud Computing and Security - First International Conference, 2015
Optimization design of a low power asynchronous DES for security applications based on Balsa and synchronous tools.
Proceedings of the 25. International Conference on Electronics, 2015
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Four-bit transient-to-digital converter with a single RC-based detection circuit for system-level ESD protection.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
Design on multi-bit adder using sense amplifier-based pass transistor logic for near-threshold voltage operation.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
A low-leakage power clamp ESD protection circuit with prolonged ESD discharge time and compact detection network.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015
An information-theoretic feature selection method based on estimation of Markov blanket.
Proceedings of the 14th IEEE International Conference on Cognitive Informatics & Cognitive Computing, 2015
2014
Novel silicon-controlled rectifier (SCR) for digital and high-voltage ESD power supply clamp.
Sci. China Inf. Sci., 2014
A power efficient 1.0625-3.125 Gb/s serial transceiver in 130 nm digital CMOS for multi-standard applications.
Sci. China Inf. Sci., 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Pattern Recognit. Lett., 2013
Thermo data-weighted average dynamic element matching (DEM) encoder for current-steering DACs.
IEICE Electron. Express, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Novel gate-voltage-bias techniques for gate-coupled MOS (GCMOS) ESD protection circuits.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013
2012
2011
Novel single-loop multi-bit sigma-delta modulator using OTA sharing technique without DEM.
IEICE Electron. Express, 2011
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2009
A unified FinFET reliability model including high K gate stack dynamic threshold voltage, hot carrier injection, and negative bias temperature instability.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
2008
Sci. China Ser. F Inf. Sci., 2008
Novel vertical channel double gate structures for high density and low power flash memory applications.
Sci. China Ser. F Inf. Sci., 2008
Generic Carrier-Based Core Model for Four-Terminal Double-Gate MOSFET Valid for Symmetric, Asymmetric, SOI, and Independent Gate Operation Modes.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
A capacitor-less low-dropout regulator for SoC with bi-directional asymmetric buffer.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Design of High-Performance Voltage Regulators Based on Frequency-Dependent Feedback Factor.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
High-Accuracy Low-Dropout Voltage Regulator Based on Slow-Rolloff Frequency Compensation.
Proceedings of the 14th IEEE International Conference on Electronics, 2007
2006
A Carrier-Based Analytic Model for Undoped (Lightly Doped) Ultra-Thin-Body Silicon-on-Insulator (UTB-SOI) MOSFETs.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
A Complete Carrier-Based Non-Charge-Sheet Analytic Theory for Nano-Scale Undoped Surrounding-Gate MOSFETs.
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
2003
Hot carrier degradation behavior in SOI dynamic-threshold-voltage nMOSFET's (n-DTMOSFET) measured by gated-diode configuration.
Microelectron. Reliab., 2003
2002
Application of forward gated-diode R-G current method in extracting F-N stress-induced interface traps in SOI NMOSFETs.
Microelectron. Reliab., 2002
2001
Extraction of the lateral distribution of interface traps in MOSFETs by a novel combined gated-diode technique.
Microelectron. Reliab., 2001
Quasi-two-dimensional subthreshold current model of deep submicrometer SOI drive-in gate controlled hybrid transistors with lateral non-uniform doping profile.
Sci. China Ser. F Inf. Sci., 2001