Luis Berrojo

According to our database1, Luis Berrojo authored at least 9 papers between 1995 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2016
Multispectral and Hyperspectral Lossless Compressor for Space Applications (HyLoC): A Low-Complexity FPGA Implementation of the CCSDS 123 Standard.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2016

2014
A run time adaptive architecture to trade-off performance for fault tolerance applied to a DVB on-board processor.
Proceedings of the 2014 NASA/ESA Conference on Adaptive Hardware and Systems, 2014

2009
Study of SEU effects in a Turbo Decoder Bit Error Rate.
Proceedings of the 10th Latin American Test Workshop, 2009

2002
An Industrial Environment for High-Level Fault-Tolerant Structures Insertion and Validation.
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002

Analysis of the Equivalences and Dominances of Transient Faults at the RT Level.
Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW 2002), 2002

New Techniques for Speeding-Up Fault-Injection Campaigns.
Proceedings of the 2002 Design, 2002

2001
Supporting Fault Tolerance in an Industrial Environment: The AMATISTA Approach.
Proceedings of the 7th IEEE International On-Line Testing Workshop (IOLTW 2001), 2001

1995
VHDL virtual prototyping.
Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP '95), 1995

An effective system development environment based on VHDL prototyping.
Proceedings of the Proceedings EURO-DAC'95, 1995


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