Roberto Sarmiento

Orcid: 0000-0002-4843-0507

According to our database1, Roberto Sarmiento authored at least 118 papers between 1989 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Abeto: An automated benchmarking tool to manage heterogeneous IP core databases.
Microprocess. Microsystems, 2024

Removing Data Dependencies in the CCSDS 123.0-B-2 Predictor Weight Updating.
IEEE Geosci. Remote. Sens. Lett., 2024

Implementation of the Principal Component Analysis onto High-Performance Computer Facilities for Hyperspectral Dimensionality Reduction: Results and Comparisons.
CoRR, 2024

2023
Formal Verification of Fault-Tolerant Hardware Designs.
IEEE Access, 2023

2022
FPGA-Based Implementation of a CNN Architecture for the On-Board Processing of Very High-Resolution Remote Sensing Images.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2022

Adaptation of the CCSDS 123.0-B-2 Standard for RGB Video Compression.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2022

Laboratory Hyperspectral Image Acquisition System Setup and Validation.
Sensors, 2022

Reducing Data Dependencies in the Feedback Loop of the CCSDS 123.0-B-2 Predictor.
IEEE Geosci. Remote. Sens. Lett., 2022

Performance Assessment of the CCSDS-123 Standard for Panchromatic Video Compression on Space Missions.
IEEE Geosci. Remote. Sens. Lett., 2022

Abeto framework: a Solution for Heterogeneous IP Management.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

A lossless compression solution for SCIP and TuMag instruments aboard of SUNRISE III balloon-borne Solar Observatory.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Speeding up FPGA Prototyping on Space Programs with HLS Workflow. Use Case: Video Compression On-board Satellites.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021
Hardware Implementation of the CCSDS 123.0-B-2 Near-Lossless Compression Standard Following an HLS Design Methodology.
Remote. Sens., 2021

EDAC implementation on a data lossless compressor compliant with the CCSDS 121.0-B-3 standard.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

Performance evaluation of state-of-the-art CNN architectures for the on-board processing of remotely sensed images.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

2020
Implementation of CCSDS Standards for Lossless Multispectral and Hyperspectral Satellite Image Compression.
IEEE Trans. Aerosp. Electron. Syst., 2020

Towards the Concurrent Execution of Multiple Hyperspectral Imaging Applications by Means of Computationally Simple Operations.
Remote. Sens., 2020

SHyLoC 2.0: A Versatile Hardware Solution for On-Board Data and Hyperspectral Image Compression on Future Space Missions.
IEEE Access, 2020

2019
A Line-by-Line Fast Anomaly Detector for Hyperspectral Imagery.
IEEE Trans. Geosci. Remote. Sens., 2019

A Hardware-Friendly Hyperspectral Lossy Compressor for Next-Generation Space-Grade Field Programmable Gate Arrays.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2019

Real-Time Hyperspectral Image Compression Onto Embedded GPUs.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2019

Deep Learning-Based Framework for <i>In Vivo</i> Identification of Glioblastoma Tumor using Hyperspectral Images of Human Brain.
Sensors, 2019

Scalable Hardware-Based On-Board Processing for Run-Time Adaptive Lossless Hyperspectral Compression.
IEEE Access, 2019

Hyperspectral Push-Broom Microscope Development and Characterization.
IEEE Access, 2019

In-Vivo Hyperspectral Human Brain Image Database for Brain Cancer Detection.
IEEE Access, 2019

Surgical aid visualization system for glioblastoma tumor identification based on deep learning and in-vivo hyperspectral images of human patients.
Proceedings of the Medical Imaging 2019: Image-Guided Procedures, 2019

Evaluation of TMR effectiveness for soft error mitigation in SHyLoC compression IP core implemented on Zynq SoC under heavy ion radiation.
Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

Dermatologic Hyperspectral Imaging System for Skin Cancer Diagnosis Assistance.
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

2018
An Algorithm for an Accurate Detection of Anomalies in Hyperspectral Images With a Low Computational Complexity.
IEEE Trans. Geosci. Remote. Sens., 2018

Accelerating the K-Nearest Neighbors Filtering Algorithm to Optimize the Real-Time Classification of Human Brain Tumor in Hyperspectral Images.
Sensors, 2018

An Intraoperative Visualization System Using Hyperspectral Imaging to Aid in Brain Tumor Delineation.
Sensors, 2018

SVM Optimization for Brain Tumor Identification Using Infrared Spectroscopic Samples.
Sensors, 2018

A Runtime-Scalable and Hardware-Accelerated Approach to On-Board Linear Unmixing of Hyperspectral Images.
Remote. Sens., 2018

Implementation of the Principal Component Analysis onto High-Performance Computer Facilities for Hyperspectral Dimensionality Reduction: Results and Comparisons.
Remote. Sens., 2018

A New Algorithm for the On-Board Compression of Hyperspectral Images.
Remote. Sens., 2018

Super-resolution with selective filter based on adaptive window and variable macro-block size.
J. Real Time Image Process., 2018

A novel FPGA-based architecture for the estimation of the virtual dimensionality in remotely sensed hyperspectral images.
J. Real Time Image Process., 2018

A note on 'beyond the trade-off and cumulative capabilities models: alternative models of operations strategy'.
Int. J. Prod. Res., 2018

A Hardware-Friendly Algorithm for the On-Board Compression of Hyperspectral Images.
Proceedings of the 9th Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2018

A Novel Highly Parallel Algorithm For The Detection And Tracking Of Chemical Gas Plumes Using Hyperspectral Video Sequences.
Proceedings of the 9th Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2018

Hardware Implementation of the CCSDS 123.0-B-1 Lossless Multispectral and Hyperspectral Image Compression Standard by means of High Level Synthesis Tools.
Proceedings of the 9th Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2018

2017
A GPU-Based Processing Chain for Linearly Unmixing Hyperspectral Images.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2017

On the Evaluation of Different High-Performance Computing Platforms for Hyperspectral Imaging: An OpenCL-Based Approach.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2017

HELICoiD: interdisciplinary and collaborative project for real-time brain cancer detection: Invited Paper.
Proceedings of the Computing Frontiers Conference, 2017

2016
A Computationally Efficient Algorithm for Fusing Multispectral and Hyperspectral Images.
IEEE Trans. Geosci. Remote. Sens., 2016

Multispectral and Hyperspectral Lossless Compressor for Space Applications (HyLoC): A Low-Complexity FPGA Implementation of the CCSDS 123 Standard.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2016

A scalable H.264/AVC deblocking filter architecture.
J. Real Time Image Process., 2016

Hyperspectral database of pathological in-vitro human brain samples to detect carcinogenic tissues.
Proceedings of the 13th IEEE International Symposium on Biomedical Imaging, 2016

SystemC modelling of lossless compression IP cores for space applications.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

A Novel Use of Hyperspectral Images for Human Brain Cancer Detection using in-Vivo Samples.
Proceedings of the 9th International Joint Conference on Biomedical Engineering Systems and Technologies (BIOSTEC 2016), 2016

2015
A Novel Negative Abundance-Oriented Hyperspectral Unmixing Algorithm.
IEEE Trans. Geosci. Remote. Sens., 2015

A New Fast Algorithm for Linearly Unmixing Hyperspectral Images.
IEEE Trans. Geosci. Remote. Sens., 2015

FPGA Implementation of the HySime Algorithm for the Determination of the Number of Endmembers in Hyperspectral Data.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2015

A Scalable and Dynamically Reconfigurable FPGA-Based Embedded System for Real-Time Hyperspectral Unmixing.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2015

Analysis of the transaction of data for a scalable video decoder.
Proceedings of the International Symposium on Consumer Electronics, 2015

FPGA implementation to estimate the number of endmembers in hyperspectral images.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014
Video enhancement using spatial and temporal super-resolution from a multi-camera system.
IEEE Trans. Consumer Electron., 2014

Parallel Implementation of the Modified Vertex Component Analysis Algorithm for Hyperspectral Unmixing Using OpenCL.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2014

Scalable architectures for real-time hyperspectral unmixing.
Microelectron. J., 2014

On the use of ritz values for calculating the number of endmembers in hyperspectral images.
Proceedings of the 6th Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2014

Spatial-temporal video enhancement using super-resolution from a multi-camera system.
Proceedings of the IEEE International Conference on Consumer Electronics, 2014

2013
Highly-Parallel GPU Architecture for Lossy Hyperspectral Image Compression.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2013

Hyperspectral Unmixing on GPUs and Multi-Core Processors: A Comparison.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2013

A New Preprocessing Technique for Fast Hyperspectral Endmember Extraction.
IEEE Geosci. Remote. Sens. Lett., 2013

GPU Implementation of an Automatic Target Detection and Classification Algorithm for Hyperspectral Image Analysis.
IEEE Geosci. Remote. Sens. Lett., 2013

A novel method to estimate the number of endmembers in hyperspectral images based on the virtual dimensionality concept.
Proceedings of the 5th Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2013

Towards the acceleration of sequential endmember extraction algorithms for time critical applications.
Proceedings of the 5th Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2013

High level modular implementation of a lossy hyperspectral image compression algorithm on a FPGA.
Proceedings of the 5th Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2013

Selective filter with adaptive size macroblock for super-resolution applications.
Proceedings of the IEEE International Symposium on Consumer Electronics, 2013

A Resource Manager for Dynamically Reconfigurable FPGA-Based Embedded Systems.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

A novel inter-layer intra prediction architecture for real-time SVC video codecs.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

FPGA implementation of a lossy compression algorithm for hyperspectral images with a high-level synthesis tool.
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013

2012
Performance Evaluation of the H.264/AVC Video Coding Standard for Lossy Hyperspectral Image Compression.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2012

A Novel Architecture for Hyperspectral Endmember Extraction by Means of the Modified Vertex Component Analysis (MVCA) Algorithm.
IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens., 2012

Special Issue on Design of Circuits and Integrated Systems.
Microprocess. Microsystems, 2012

A Low-Computational-Complexity Algorithm for Hyperspectral Endmember Extraction: Modified Vertex Component Analysis.
IEEE Geosci. Remote. Sens. Lett., 2012

GPU implementation of a lossy compression algorithm for hyperspectral images.
Proceedings of the 4th Workshop on Hyperspectral Image and Signal Processing, 2012

High-level FPGA-based implementation of a hyperspectral endmember extraction algorithm.
Proceedings of the 4th Workshop on Hyperspectral Image and Signal Processing, 2012

Parallel implementation of a hyperspectral unmixing chain: Graphic processing units versus multi-core processors.
Proceedings of the 2012 IEEE International Geoscience and Remote Sensing Symposium, 2012

2011
Novel architectures for real-time matching in hyperspectral images.
Proceedings of the 3rd Workshop on Hyperspectral Image and Signal Processing: Evolution in Remote Sensing, 2011

Scalable Models for Autonomous Self-Assembled Reconfigurable Systems.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

FPGA Design of an Automatic Target Generation Process for Hyperspectral Image Analysis.
Proceedings of the 17th IEEE International Conference on Parallel and Distributed Systems, 2011

A novel scalable Deblocking Filter architecture for H.264/AVC and SVC video codecs.
Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011

Run-Time Scalable Architecture for Deblocking Filtering in H.264/AVC-SVC Video Codecs.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010
Medical Diagnosis Improvement Through Image Quality Enhancement Based on Super-Resolution.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Exploration of hardware sharing for image encoders.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
A novel real-time DSP-based video super-resolution system.
IEEE Trans. Consumer Electron., 2009

Processor Customization for Software Implementation of the AES Algorithm for Wireless Sensor Networks.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009

2008
An Efficient Double-Filter Hardware Architecture for H.264/AVC Deblocking Filtering.
IEEE Trans. Consumer Electron., 2008

A flexible template for H.264/AVC block matching motion estimation architectures.
IEEE Trans. Consumer Electron., 2008

Analysis of fast block matching motion estimation algorithms for video super-resolution systems.
IEEE Trans. Consumer Electron., 2008

GMDS: Hardware implementation of novel real output queuing architecture.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Mapping control-intensive video kernels onto a coarse-grain reconfigurable architecture: the H.264/AVC deblocking filter.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Low-Cost Super-Resolution Algorithms Implementation Over a HW/SW Video Compression Platform.
EURASIP J. Adv. Signal Process., 2006

A 900 MHz Multiphase LC Oscillator with Sinusoidal Outputs in SiGe Technology.
Proceedings of the 13th IEEE International Conference on Electronics, 2006

A Low Power 2.5 Gbps 1: 32 Deserializer in SiGe BiCMOS Technology.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005
A gigabit multidrop serial backplane for high-speed digital systems based on asymmetrical power splitter.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

Experimental gigabit multidrop serial backplane for high speed digital systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Low cost efficient architecture for H.264 motion estimation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Low-cost implementation of a super-resolution algorithm for real-time video applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A High Quality/Low Computational Cost Technique for Block Matching Motion Estimation.
Proceedings of the 2005 Design, 2005

2004
Split-engine packet classification: a novel approach to multi-field packet classification on high performance routers with QoS support.
Proceedings of the Global Telecommunications Conference, 2004. GLOBECOM '04, Dallas, Texas, USA, 29 November, 2004

2002
Round-trip delay effect on iterative request-grant-accept scheduling algorithms for virtual output queue switches.
Proceedings of the Global Telecommunications Conference, 2002

2001
A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001

A compact layout technique to minimize high frequency switching effects in high speed circuits.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
A Single Phase Latch for High Speed GaAs Domino Circuits.
Proceedings of the 2000 Design, 2000

1999
Low Power Techniques for Digital GaAs VLSI.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

High Speed GaAs Subsystem Design using Feed Through Logic.
Proceedings of the 1999 Design, 1999

1998
A CORDIC processor for FFT computation and its implementation using gallium arsenide technology.
IEEE Trans. Very Large Scale Integr. Syst., 1998

Circuits for Low Power Consumption in GaAs Technology.
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998

OLYMPO: a GaAs compiler for VLSI design.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design.
Proceedings of the 1998 Design, 1998

1997
Noise margin enhancement in GaAs ROM's using current mode logic.
IEEE J. Solid State Circuits, 1997

GaAs pseudodynamic latched logic for high performance processor cores.
IEEE J. Solid State Circuits, 1997

1994
Implementation of a CORDIC Processor for CFFT Computation in Gallium Arsenide Technology.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

1993
Integer and control units for a GaAs 32-bit RISC processor.
Microprocess. Microprogramming, 1993

1991
Speed-area-power optimization for DCFL and SDCFL class of logic using ring notation.
Microprocessing and Microprogramming, 1991

1989
Some results in GaAs processor design using LSI integrated circuits.
Microprocess. Microprogramming, 1989


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