M. Hüsrev Cilasun

According to our database, M. Hüsrev Cilasun authored at least 29 papers between 2016 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

The Case for Secure Miniservers Beyond the Edge.

Salonik Resch, Hüsrev Cilasun, Zamshed I. Chowdhury, Masoud Zabihi, Yang Lv, Jianping Wang, Sachin S. Sapatnekar, Ismail Akturk, Ulya R. Karpuzcu

IEEE Trans. Computers, October, 2025

2024

COBI: A Coupled Oscillator Based Ising Chip for Combinatorial Optimization.

Hüsrev Cilasun, William Moy, Ziqing Zeng, Tahmida Islam, Hao Lo, Alex Vanasse, Megan Tan, Mohammad Anees, Ramprasath S, Abhimanyu Kumar, Sachin S. Sapatnekar, Chris H. Kim, Ulya R. Karpuzcu

Dataset, January, 2024

On Heterogeneous Ising Machines.

Hüsrev Cilasun, Abhimanyu Kumar, Ziqing Zeng, Nafisa Sadaf Prova, Sachin S. Sapatnekar, Ulya R. Karpuzcu

CoRR, 2024

On Error Correction for Nonvolatile Processing-In-Memory.

Hüsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Masoud Zabihi, Yang Lv, Brandon Zink, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

On Gate Flip Errors in Computing-In-Memory.

Zamshed I. Chowdhury, Hüsrev Cilasun, Salonik Resch, Masoud Zabihi, Yang Lv, Brandon Zink, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

Experimental demonstration of magnetic tunnel junction-based computational random-access memory.

Yang Lv, Brandon R. Zink, Robert P. Bloom, M. Hüsrev Cilasun, Pravin Khanal, Salonik Resch, Zamshed I. Chowdhury, Ali Habiboglu, Weigang Wang, Sachin S. Sapatnekar, Ulya R. Karpuczu, Jianping Wang

CoRR, 2023

3SAT on an All-to-All-Connected CMOS Ising Solver Chip.

M. Hüsrev Cilasun, Ziqing Zeng, Ramprasath S, Abhimanyu Kumar, Hao Lo, William Cho, Chris H. Kim, Ulya R. Karpuzcu, Sachin S. Sapatnekar

CoRR, 2023

On Endurance of Processing in (Nonvolatile) Memory.

Salonik Resch, M. Hüsrev Cilasun, Zamshed I. Chowdhury, Masoud Zabihi, Zhengyang Zhao, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

PimCity: A Compute in Memory Substrate featuring both Row and Column Parallel Computing.

Salonik Resch, Hüsrev Cilasun, Masoud Zabihi, Zamshed Iqbal Chowdhury, Zhengyang Zhao, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the IEEE International Conference on Rebooting Computing, 2023

2022

Energy-efficient and Reliable Inference in Nonvolatile Memory under Extreme Operating Conditions.

Salonik Resch, S. Karen Khatamifard, Zamshed I. Chowdhury, Masoud Zabihi, Zhengyang Zhao, M. Hüsrev Cilasun, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

ACM Trans. Embed. Comput. Syst., September, 2022

CRAM-Seq: Accelerating RNA-Seq Abundance Quantification Using Computational RAM.

Zamshed I. Chowdhury, S. Karen Khatamifard, Salonik Resch, M. Hüsrev Cilasun, Zhengyang Zhao, Masoud Zabihi, Meisam Razaviyayn, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

IEEE Trans. Emerg. Top. Comput., 2022

Error Detection and Correction for Processing in Memory (PiM).

M. Hüsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Masoud Zabihi, Yang Lv, Brandon Zink, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

CoRR, 2022

FPGA-accelerated simulation of variable latency memory systems.

Hüsrev Cilasun, Chris Macaraeg, Ivy Bo Peng, Abhik Sarkar, Maya B. Gokhale

Proceedings of the 2022 International Symposium on Memory Systems, 2022

2021

Spiking Neural Networks in Spintronic Computational RAM.

M. Hüsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Erin Olson, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Keshab K. Parhi, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

ACM Trans. Archit. Code Optim., 2021

Towards Homomorphic Inference Beyond the Edge.

Salonik Resch, Zamshed I. Chowdhury, M. Hüsrev Cilasun, Masoud Zabihi, Zhengyang Zhao, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

CoRR, 2021

Exploring the Feasibility of Using 3D XPoint as an In-Memory Computing Accelerator.

Masoud Zabihi, Salonik Resch, M. Hüsrev Cilasun, Zamshed I. Chowdhury, Zhengyang Zhao, Ulya R. Karpuzcu, Jianping Wang, Sachin S. Sapatnekar

CoRR, 2021

Cryogenic PIM: Challenges & Opportunities.

Salonik Resch, M. Hüsrev Cilasun, Ulya R. Karpuzcu

IEEE Comput. Archit. Lett., 2021

Seeds of SEED: H-CRAM: In-memory Homomorphic Search Accelerator using Spintronic Computational RAM.

M. Hüsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the 2021 International Symposium on Secure and Private Execution Environment Design (SEED), 2021

CAMeleon: Reconfigurable B(T)CAM in Computational RAM.

Zamshed I. Chowdhury, Salonik Resch, M. Hüsrev Cilasun, Zhengyang Zhao, Masoud Zabihi, Sachin S. Sapatnekar, Jianping Wang, Ulya R. Karpuzcu

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020

An Inference and Learning Engine for Spiking Neural Networks in Computational RAM (CRAM).

M. Hüsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Erin Olson, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Keshab K. Parhi, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

CoRR, 2020

MOUSE: Inference In Non-volatile Memory for Energy Harvesting Applications.

Salonik Resch, S. Karen Khatamifard, Zamshed I. Chowdhury, Masoud Zabihi, Zhengyang Zhao, M. Hüsrev Cilasun, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

CRAFFT: High Resolution FFT Accelerator In Spintronic Computational RAM.

M. Hüsrev Cilasun, Salonik Resch, Zamshed Iqbal Chowdhury, Erin Olson, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2018

Exploiting Reversible Computing for Latent-Fault-Free Error Detecting/Correcting CMOS Circuits.

Mustafa Altun, Sajjad Parvin, M. Hüsrev Cilasun

IEEE Access, 2018

Fast DST optimizations for intra-frame coding.

M. Hüsrev Cilasun, Fatih Kamisli

Proceedings of the 26th Signal Processing and Communications Applications Conference, 2018

Coding Gain Optimized 8-Point DST with Fast Algorithm for Intra-frames in Video Coding.

M. Hüsrev Cilasun, Fatih Kamisli

Proceedings of the 26th European Signal Processing Conference, 2018

2017

Synthesis and fundamental energy analysis of fault-tolerant CMOS circuits.

Iike Ercan, Omercan Susam, Mustafa Altun, M. Hüsrev Cilasun

Proceedings of the 14th International Conference on Synthesis, 2017

2016

Generalized Multiple Counting Jacobsthal Sequences of Fermat Pseudoprimes.

M. Hüsrev Cilasun

J. Integer Seq., 2016

Deep learning based autonomous direction estimation.

Hulya Yalcin, M. Hüsrev Cilasun

Proceedings of the 24th Signal Processing and Communication Application Conference, 2016

A deep learning approach to EEG based epilepsy seizure determination.

M. Hüsrev Cilasun, Hulya Yalcin

Proceedings of the 24th Signal Processing and Communication Application Conference, 2016