Mao-Yin Wang

According to our database, Mao-Yin Wang authored at least 5 papers between 2004 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

Monitoring and timing prediction in early analyzing and checking performance of interconnection networks at ESL.

Mao-Yin Wang, Jen-Chieh Yeh

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2010

A Mesh-Structured Scalable IPsec Processor.

Mao-Yin Wang, Cheng-Wen Wu

IEEE Trans. Very Large Scale Integr. Syst., 2010

Single- and Multi-core Configurable AES Architectures for Flexible Security.

Mao-Yin Wang, Chih-Pin Su, Chia-Lung Horng, Cheng-Wen Wu, Chih-Tsun Huang

IEEE Trans. Very Large Scale Integr. Syst., 2010

2008

Area and Test Cost Reduction for On-Chip Wireless Test Channels with System-Level Design Techniques.

Chun-Kai Hsu, Li-Ming Denq, Mao-Yin Wang, Jing-Jia Liou, Chih-Tsun Huang, Cheng-Wen Wu

Proceedings of the 17th IEEE Asian Test Symposium, 2008

2004

An HMAC processor with integrated SHA-1 and MD5 algorithms.

Mao-Yin Wang, Chih-Pin Su, Chih-Tsun Huang, Cheng-Wen Wu

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004