Marco Bucci
Orcid: 0000-0002-5206-8651
  According to our database1,
  Marco Bucci
  authored at least 29 papers
  between 1988 and 2020.
  
  
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
  2020
Magia: Robust Automated Image Processing and Kinetic Modeling Toolbox for PET Neuroinformatics.
    
  
    Frontiers Neuroinformatics, 2020
    
  
  2016
    Proceedings of the New Codebreakers, 2016
    
  
  2012
    IEEE Trans. Very Large Scale Integr. Syst., 2012
    
  
  2011
    Proceedings of the Encyclopedia of Cryptography and Security, 2nd Ed., 2011
    
  
    IEEE Trans. Very Large Scale Integr. Syst., 2011
    
  
  2009
    Proceedings of the 16th IEEE International Conference on Electronics, 2009
    
  
  2008
    IEEE Trans. Circuits Syst. I Regul. Pap., 2008
    
  
    IET Circuits Devices Syst., 2008
    
  
    Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
    
  
    Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008
    
  
  2007
A Dynamic and Differential CMOS Lookup Table with Data-Independent Power Consumption for Cryptographic Applications on Chip Cards.
    
  
    IEEE Trans. Dependable Secur. Comput., 2007
    
  
    IET Inf. Secur., 2007
    
  
    Proceedings of the 18th European Conference on Circuit Theory and Design, 2007
    
  
    Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007
    
  
  2006
    Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
    
  
    Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
    
  
    Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006
    
  
    Proceedings of the Cryptographic Hardware and Embedded Systems, 2006
    
  
  2005
    Proceedings of the Encyclopedia of Cryptography and Security, 2005
    
  
A countermeasure against differential power analysis based on random delay insertion.
    
  
    Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
    
  
    Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29, 2005
    
  
  2004
A Power Consumption Randomization Countermeasure for DPA-Resistant Cryptographic Processors.
    
  
    Proceedings of the Integrated Circuit and System Design, 2004
    
  
    Proceedings of the Cryptographic Hardware and Embedded Systems, 2004
    
  
  2003
A High-Speed Oscillator-Based Truly Random Number Source for Cryptographic Applications on a Smart Card IC.
    
  
    IEEE Trans. Computers, 2003
    
  
    Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003
    
  
  2002
    Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
    
  
  2001
  1999
    Proceedings of the Cryptographic Hardware and Embedded Systems, 1999
    
  
  1988