Raimondo Luzzi

Proceedings of the New Codebreakers, 2016

2012

A Flip-Flop for the DPA Resistant Three-Phase Dual-Rail Pre-Charge Logic Family.

[BibT_eX]

[DOI]

Luca Giancane

IEEE Trans. Very Large Scale Integr. Syst., 2012

2011

Delay-Based Dual-Rail Precharge Logic.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2011

2009

Delay-based dual-rail pre-charge logic.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

Fully Digital Random Bit Generators for Cryptographic Applications.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Enhancing power analysis attacks against cryptographic devices.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2008

Differential Capacitance Analysis.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

A Low Leakage Non-Volatile Memory Voltage Pulse Generator for RFID Applications.

[BibT_eX]

[DOI]

Santos Torres Vargas

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007

A Dynamic and Differential CMOS Lookup Table with Data-Independent Power Consumption for Cryptographic Applications on Chip Cards.

[BibT_eX]

[DOI]

Luca Giancane

IEEE Trans. Dependable Secur. Comput., 2007

Testing power-analysis attack susceptibility in register-transfer level designs.

[BibT_eX]

[DOI]

IET Inf. Secur., 2007

Digital post-processing for testable random bit generators.

[BibT_eX]

[DOI]

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

A Testable Random Bit Generator Based on a High Resolution Phase Noise Detection.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006

A novel concept for stateless random bit generators in cryptographic applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Enhancing power analysis attacks against cryptographic devices.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Leakage-based Random Bit Generator with On-line Fault Detection.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

Three-Phase Dual-Rail Pre-charge Logic.

[BibT_eX]

[DOI]

Luca Giancane

Proceedings of the Cryptographic Hardware and Embedded Systems, 2006

2005

A countermeasure against differential power analysis based on random delay insertion.

[BibT_eX]

[DOI]

Michele Guglielmo

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2-V CMOS current operational amplifier with high CMRR.

[BibT_eX]

[DOI]

Salvatore Pennisi

Giuseppe Scotti

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005

Design of Testable Random Bit Generators.

[BibT_eX]

[DOI]

Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2005, 7th International Workshop, Edinburgh, UK, August 29, 2005

2004

A Power Consumption Randomization Countermeasure for DPA-Resistant Cryptographic Processors.

[BibT_eX]

[DOI]

Michele Guglielmo

Proceedings of the Integrated Circuit and System Design, 2004

An Offset-Compensated Oscillator-Based Random Bit Source for Security Applications.

[BibT_eX]

[DOI]

Holger Bock

Proceedings of the Cryptographic Hardware and Embedded Systems, 2004

2003

A High-Speed Oscillator-Based Truly Random Number Source for Cryptographic Applications on a Smart Card IC.

[BibT_eX]

[DOI]

Lucia Germani

Mario Varanonuovo

IEEE Trans. Computers, 2003

A charge injection based CMOS charge-pump.

[BibT_eX]

[DOI]

Salvatore Pennisi

Proceedings of the 2003 10th IEEE International Conference on Electronics, 2003

2002

A high speed truly IC random number source for smart card microcontrollers.

[BibT_eX]

[DOI]