Masayuki Terai

According to our database, Masayuki Terai authored at least 17 papers between 1978 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

A Parallel Method to Extract Critical Areas of Net Pairs for Diagnosing Bridge Faults.

Keiichi Suemitsu, Toshiaki Ito, Toshiki Kanamoto, Masayuki Terai, Satoshi Kotani, Shigeo Sawada

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

Delayed-ABC SOI for crosstalk noise repair.

Akira Tada, Hiromi Notani, Genichi Tanaka, Toshiaki Iwamatsu, Takashi Ipposhi, Masayuki Terai, Masaaki Iijima, Masahiro Numa

IEICE Electron. Express, 2008

2007

A Fast Characterizing Method for Large Embedded Memory Modules on SoC.

Masahiko Omura, Toshiki Kanamoto, Michiko Tsukamoto, Mitsutoshi Shirota, Takashi Nakajima, Masayuki Terai

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2005

A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures.

Toshiki Kanamoto, Tetsuya Watanabe, Mitsutoshi Shirota, Masayuki Terai, Tatsuya Kunikiyo, Kiyoshi Ishikawa, Yoshihide Ajioka, Yasutaka Horiba

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

1998

A new router for reducing "antenna effect" in ASIC design.

Hiroshi Shirota, Toshiyuki Sadakane, Masayuki Terai, Kaoru Okazaki

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

A CMOS cell generation system for two-dimensional transistor placement.

Satoshi Shibatani, Toshiyuki Sadakane, Hiroomi Nakao, Masayuki Terai, Kaoru Okazaki

Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998

1995

Min-cut placement with global objective functions for large scale sea-of-gates arrays.

Kazuhiro Takahashi, Kazuo Nakajima, Masayuki Terai, Koji Sato

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

1994

A new approach to over-the-cell channel routing with three layers.

Masayuki Terai, Kazuo Nakajima, Kazuhiro Takahashi, Koji Sato

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

Adaptive cut line selection in min-cut placement for large scale sea-of-gates arrays.

Kazuhiro Takahashi, Kazuo Nakajima, Masayuki Terai, Koji Sato

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1991

A New Model for Over-The-Cell Channel Routing with Three Layers.

Masayuki Terai, Kazuhiro Takahashi, Kazuo Nakajima, Koji Sato

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990

A New Min-Cut Placement Algorithm for Timing Assurance Layout Design Meeting Net Length Constraint.

Masayuki Terai, Kazuhiro Takahashi, Koji Sato

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1987

Symbolic Layout System: Application Results and Functional Improvements.

Masayuki Terai, Yoshihide Ajioka, Tomoyoshi Noda, Masaru Ozaki, Tsunenori Umeki, Koji Sato

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987

1985

A Method of Improving the Terminal Assignment in the Channel Routing for Gate Arrays.

Masayuki Terai

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985

1982

A consideration of the number of horizontal grids used in the routing of a masterslice layout.

Masayuki Terai, Hajime Kanada, Koji Sato, Toshihiko Yahara

Proceedings of the 19th Design Automation Conference, 1982

1981

An integrated computer aided design system for gate array masterslices: Part 2 the layout design system MARS-M3.

Chiyoji Tanaka, Shinichi Murai, Hiroo Tsuji, Toshihiko Yahara, Kaoru Okazaki, Masayuki Terai, Reiji Katoh, Mikio Tachibana

Proceedings of the 18th Design Automation Conference, 1981

An integrated computer aided design system for gate array masterslices: Part 1. Logic reorganization system LORES-2.

Chiyoji Tanaka, Shinichi Murai, Shunichiro Nakamura, Takuji Ogihara, Masayuki Terai, Kozo Kinoshita

Proceedings of the 18th Design Automation Conference, 1981

1978

LORES - Logic Reorganization System.

Shunichiro Nakamura, Shinichi Murai, Chiyoji Tanaka, Masayuki Terai, Hideo Fujiwara, Kozo Kinoshita

Proceedings of the 15th Design Automation Conference, 1978