Toshiaki Iwamatsu

According to our database, Toshiaki Iwamatsu authored at least 6 papers between 1994 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2014

A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology.

Koichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham, Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita, Shiro Kamohara, Masaru Kadoshima, Keiichi Maekawa, Tomohiro Yamashita, Duc-Hung Le, Takumu Yomogita, Masaru Kudo, Kuniaki Kitamori, Shuya Kondo, Yuuki Manzawa

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2010

A 0.5V 100MHz PD-SOI SRAM with enhanced read stability and write margin by asymmetric MOSFET and forward body bias.

Koji Nii, Makoto Yabuuchi, Yasumasa Tsukamoto, Yuuichi Hirano, Toshiaki Iwamatsu, Yuji Kihara

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008

Delayed-ABC SOI for crosstalk noise repair.

Akira Tada, Hiromi Notani, Genichi Tanaka, Toshiaki Iwamatsu, Takashi Ipposhi, Masayuki Terai, Masaaki Iijima, Masahiro Numa

IEICE Electron. Express, 2008

2007

A 0.05�?0.05mm2 RFID Chip with Easily Scaled-Down ID-Memory.

Mitsuo Usami, Hisao Tanabe, Akira Sato, Isao Sakama, Yukio Maki, Toshiaki Iwamatsu, Takashi Ipposhi, Yasuo Inoue

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

An SOI-Based 7.5µm-Thick 0.15x0.15mm2 RFID Chip.

Mitsuo Usami, Akira Sato, Hisao Tanabe, Toshiaki Iwamatsu, Shigeto Maegawa, Yuzuru Ohji

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

1994

An SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology.

Katsuhiro Suma, Takahiro Tsuruda, Hideto Hidaka, Takahisa Eimori, Toshiyuki Oashi, Yasuo Yamaguchi, Toshiaki Iwamatsu, Masakazu Hirose, Fukashi Morishita, Kazutarni Arimoto, Kazuyasu Fujishima, Yasuo Inoue, Tadashi Nishimura, Tsutomu Yoshihara

IEEE J. Solid State Circuits, November, 1994