Takashi Ipposhi

According to our database1, Takashi Ipposhi authored at least 14 papers between 2005 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2009
A Look-ahead Active Body-biasing scheme for SOI-SRAM with dynamic <i>V</i><sub>DDM</sub> control.
IEICE Electron. Express, 2009

2008
Low Power SRAM with Boost Driver Generating Pulsed Word Line Voltage for Sub-1V Operation.
J. Comput., 2008

Delayed-ABC SOI for crosstalk noise repair.
IEICE Electron. Express, 2008

2007
A Configurable Enhanced TTRAM Macro for System-Level Power Management Unified Memory.
IEEE J. Solid State Circuits, 2007

A High-Density Scalable Twin Transistor RAM (TTRAM) With Verify Control for SOI Platform Memory IPs.
IEEE J. Solid State Circuits, 2007

A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI.
IEICE Trans. Electron., 2007

Look-Ahead Dynamic Threshold Voltage Control Scheme for Improving Write Margin of SOI-7T-SRAM.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation.
IEICE Trans. Electron., 2007

Charge recycling in MTCMOS circuits with block dividing.
IEICE Electron. Express, 2007

Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

A 0.05�?0.05mm2 RFID Chip with Easily Scaled-Down ID-Memory.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006
Dynamic threshold voltage control for dual supply voltage scheme on PD-SOI.
IEICE Electron. Express, 2006

A Scalable ET2RAM (SETRAM) with Verify Control for SoC Platform Memory IP on SOI.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2005
A capacitorless twin-transistor random access memory (TTRAM) on SOI.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005


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