Massimo Poli

Integr., 2011

2010

A General Power Model of Differential Power Analysis Attacks to Static Logic Circuits.

[BibT_eX]

[DOI]

Santina Rocchi

IEEE Trans. Very Large Scale Integr. Syst., 2010

Differential Power Analysis Attacks to Precharged Buses: A General Analysis for Symmetric-Key Cryptographic Algorithms.

[BibT_eX]

[DOI]

Santina Rocchi

IEEE Trans. Dependable Secur. Comput., 2010

Simple and accurate modeling of the output transition time in nanometer CMOS gates.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2010

2009

Analysis and Modeling of Energy Consumption in RLC Tree Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2009

2008

A general model for differential power analysis attacks to static logic circuits.

[BibT_eX]

[DOI]

Santina Rocchi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Explicit energy evaluation in RLC tree circuits with ramp inputs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Energy evaluation in RLC tree circuits with exponential input.

[BibT_eX]

[DOI]

Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

2007

Propagation Delay of an <i>RC</i>-Chain With a Ramp Input.

[BibT_eX]

[DOI]

Rosario Mita

IEEE Trans. Circuits Syst. II Express Briefs, 2007

Mixed Techniques to Protect Precharged Busses against Differential Power Analysis Attacks.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

System-Level Design for Nano-Electronics.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on Electronics, 2007

Efficient and Accurate Models of Output Transition Time in CMOS Logic.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on Electronics, 2007

A General Model of DPA Attacks to Precharged Busses in Symmetric-Key Cryptographic Algorithms.

[BibT_eX]

[DOI]

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

Energy consumption in RLC tree circuits.

[BibT_eX]

[DOI]

Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2006

Modellazione dinamica ed energetica delle reti RC nei sistemi VLSI.

[BibT_eX]

[DOI]

PhD thesis, 2006

Energy Consumption in RC Tree Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2006

Techniques to Enhance the Resistance of Precharged Busses to Differential Power Analysis.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Power Modeling of Precharged Address Bus and Application to Multi-bit DPA Attacks to DES Algorithm.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Efficient output transition time modeling in CMOS gates with ramp/exponential inputs.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

RC-Chain: a Simple Model of Delay with a Ramp Input.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2005

Energy Consumption in RC Tree Circuits with Exponential Inputs: An Analytical Model.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design, 2005

2004

Evaluation of energy consumption in RC ladder circuits driven by a ramp input.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2004

A gate-level strategy to design Carry Select Adders.

[BibT_eX]

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2002

An Approach to Energy Consumption Modeling in RC Ladder Circuits.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

Propagation delay model of current driven RC chain.

[BibT_eX]

[DOI]