Maya Gokhale

According to our database1, Maya Gokhale authored at least 101 papers between 1986 and 2019.

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Awards

IEEE Fellow

IEEE Fellow 2007, "For contributions to reconfigurable computing technology".

Timeline

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Bibliography

2019
Performance Assessment of Emerging Memories Through FPGA Emulation.
IEEE Micro, 2019

System Evaluation of the Intel Optane Byte-addressable NVM.
CoRR, 2019

2018
Design space exploration of near memory accelerators.
Proceedings of the International Symposium on Memory Systems, 2018

Microscope on Memory: MPSoC-Enabled Computer Memory System Assessments.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017
Near memory key/value lookup acceleration.
Proceedings of the International Symposium on Memory Systems, 2017

Performance Evaluation of Scale-Free Graph Algorithms in Low Latency Non-volatile Memory.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

Argo NodeOS: Toward Unified Resource Management for Exascale.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium, 2017

Accelerating Big Data Infrastructure and Applications (Ongoing Collaboration).
Proceedings of the 37th IEEE International Conference on Distributed Computing Systems Workshops, 2017

2016
Graph colouring as a challenge problem for dynamic graph processing on distributed systems.
Proceedings of the International Conference for High Performance Computing, 2016

Evaluating the feasibility of storage class memory as main memory.
Proceedings of the Second International Symposium on Memory Systems, 2016

RRAM-based TCAMs for pattern search.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Towards a Distributed Large-Scale Dynamic Graph Data Store.
Proceedings of the 2016 IEEE International Parallel and Distributed Processing Symposium Workshops, 2016

ClearView: Data cleaning for online review mining.
Proceedings of the 2016 IEEE/ACM International Conference on Advances in Social Networks Analysis and Mining, 2016

2015
In-Memory Data Rearrangement for Irregular, Data-Intensive Computing.
IEEE Computer, 2015

DI-MMAP - a scalable memory-map runtime for out-of-core data-intensive applications.
Cluster Computing, 2015

Hybrid memory cube performance characterization on data-centric workloads.
Proceedings of the 5th Workshop on Irregular Applications - Architectures and Algorithms, 2015

Message from chairs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Near memory data structure rearrangement.
Proceedings of the 2015 International Symposium on Memory Systems, 2015

A Container-Based Approach to OS Specialization for Exascale Computing.
Proceedings of the 2015 IEEE International Conference on Cloud Engineering, 2015

2014
Faster Parallel Traversal of Scale Free Graphs at Extreme Scale with Vertex Delegates.
Proceedings of the International Conference for High Performance Computing, 2014

Multi-threaded streamline tracing for data-intensive architectures.
Proceedings of the 4th IEEE Symposium on Large Data Analysis and Visualization, 2014

RAW 2014 Keynotes.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

Design and Optimization of a Metagenomics Analysis Workflow for NVRAM.
Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

2013
QMDS: a file system metadata management service supporting a graph data model-based query language.
IJPEDS, 2013

Scalable metagenomic taxonomy classification using a reference genome database.
Bioinformatics, 2013

Keynote 3 - Extreme scale challenges: Can reconfigurable computing come to the rescue?
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Scaling Techniques for Massive Scale-Free Graphs in Distributed (External) Memory.
Proceedings of the 27th IEEE International Symposium on Parallel and Distributed Processing, 2013

Minerva: Accelerating Data Analysis in Next-Generation SSDs.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

2012
DI-MMAP: A High Performance Memory-Map Runtime for Data-Intensive Applications.
Proceedings of the 2012 SC Companion: High Performance Computing, 2012

On the Role of NVRAM in Data-intensive Architectures: An Evaluation.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium, 2012

Accelerating a Random Forest Classifier: Multi-Core, GP-GPU, or FPGA?
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
Massively parallel acceleration of a document-similarity classifier to detect web attacks.
J. Parallel Distrib. Comput., 2011

Poster: FOX: a fault-oblivious extreme scale execution environment.
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, 2011

QMDS: A File System Metadata Management Service Supporting a Graph Data Model-Based Query Language.
Proceedings of the Sixth International Conference on Networking, Architecture, and Storage, 2011

2010
Multithreaded Asynchronous Graph Traversal for In-Memory and Semi-External Memory.
Proceedings of the Conference on High Performance Computing Networking, 2010

A configurable-hardware document-similarity classifier to detect web attacks.
Proceedings of the 24th IEEE International Symposium on Parallel and Distributed Processing, 2010

FPGA Based Network Traffic Analysis Using Traffic Dispersion Patterns.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

Real-Time Classification of Multimedia Traffic Using FPGA.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
Application Experiments: MPPA and FPGA.
Proceedings of the FCCM 2009, 2009

2008
Instruction Sets.
Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008

A Case Study of Hardware/Software Partitioning of Traffic Simulation on the Cray XD1.
IEEE Trans. VLSI Syst., 2008

Accelerating Molecular Dynamics Simulations with Reconfigurable Computers.
IEEE Trans. Parallel Distrib. Syst., 2008

Hardware Technologies for High-Performance Data-Intensive Computing.
IEEE Computer, 2008

2007
Reliability Analysis of Large Circuits Using Scalable Techniques and Tools.
IEEE Trans. on Circuits and Systems, 2007

A reconfigurable computing framework for multi-scale cellular image processing.
Microprocessors and Microsystems, 2007

Comparison of feature selection and classification algorithms in identifying malicious executables.
Computational Statistics & Data Analysis, 2007

Trident: From High-Level Language to Hardware Circuitry.
IEEE Computer, 2007

Scalable techniques and tools for reliability analysis of large circuits.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Language classification using n-grams accelerated by FPGA-based Bloom filters.
Proceedings of the 1st international workshop on High-performance reconfigurable computing technology and applications, 2007

Matched Filter Computation on FPGA, Cell and GPU.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

On the Acceleration of Shortest Path Calculations in Transportation Networks.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006
Dynamic reconfiguration for management of radiation-induced faults in FPGAs.
IJES, 2006

Panel: Nano-computing - do we need new formal approaches?
Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

RAW keynote 1: the outer limits: reconfigurable computing in space and in orbit.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

The STAR-C Truth: Analyzing Reconfigurable Supercomputing Reliability.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

A Programmable, Maximal Throughput Architecture for Neighborhood Image Processing.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Promises and Pitfalls of Reconfigurable Supercomputing.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006

A Run-Time Re-configurable Parametric Architecture for Local Neighborhood Image Processing.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

A hybrid framework for design and analysis of fault-tolerant architectures.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Partitioning Hardware and Software for Reconfigurable Supercomputing Applications: A Case Study.
Proceedings of the ACM/IEEE SC2005 Conference on High Performance Networking and Computing, 2005

Trident: An FPGA Compiler Framework for Floating-Point Algorithms.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Metropolitan Road Traffic Simulation on FPGAs.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005

Detecting a malicious executable without prior knowledge of its patterns.
Proceedings of the Data Mining, 2005

2004
Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Monte Carlo Radiative Heat Transfer Simulation on a Reconfigurable Computer.
Proceedings of the Field Programmable Logic and Application, 2004

Communications Scheduling for Concurrent Processes on Reconfigurable Computers.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

A Constraints Programming Approach to Communication Scheduling on SoPC Architectures.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2003
Experience with a Hybrid Processor: K-Means Clustering.
The Journal of Supercomputing, 2003

Polymorphous fabric-based systems: Model, tools, applications.
Journal of Systems Architecture, 2003

Optimizing Digital Hardware Perceptrons for Multi-Spectral Image Classification.
Journal of Mathematical Imaging and Vision, 2003

Fabric-Based Systems: Model, Tools, Applications.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

Gamma-Ray Pulsar Detection using Reconfigurable Computing Hardware.
Proceedings of the 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2003), 2003

A Preliminary Study of Molecular Dynamics on Reconfigurable Computers.
Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, June 23, 2003

2002
A Polymorphous Computing Fabric.
IEEE Micro, 2002

Granidt: Towards Gigabit Rate Network Intrusion Detection Technology.
Proceedings of the Field-Programmable Logic and Applications, 2002

2001
Mutable Functional Units and Their Applications on Microprocessors.
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

Evaluation of the streams-C C-to-FPGA compiler: an applications perspective.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001

Mutable Functional Units: Initial Results.
Proceedings of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2001

Evolving Network Architectures With Custom Computers For Multi-Spectral Feature Identification.
Proceedings of the 3rd NASA / DoD Workshop on Evolvable Hardware (EH 2001), 2001

2000
Co-Synthesis to a Hybrid RISC/FPGA Architecture.
VLSI Signal Processing, 2000

Interfacing interpreted and compiled languages to support applications on a massively parallel network of workstations (MP-NOW).
Cluster Computing, 2000

Stream-Oriented FPGA Computing in the Streams-C High Level Language.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1999
Interfacing Interpreted and Compiled Languages to Support Applications on a Massively Parallel Network of Workstations (MP-NOW)
CoRR, 1999

Automatic Allocation of Arrays to Memories in FPGA Processors with Multiple Memory Banks.
Proceedings of the 7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '99), 1999

1998
The NAPA Adaptive Processing Architecture.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

NAPA C: Compiling for a Hybrid RISC/FPGA Architecture.
Proceedings of the 6th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '98), 1998

1997
High level compilation for fine grained FPGAs.
Proceedings of the 5th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '97), 1997

1995
Data-parallel C on a reconfigurable logic array.
The Journal of Supercomputing, 1995

Processing in Memory: The Terasys Massively Parallel PIM Array.
IEEE Computer, 1995

Automatic Synthesis of Parallel Programs Targeted to Dynamically Reconfigurable Logic Arrays.
Proceedings of the Field-Programmable Logic and Applications, 5th International Workshop, 1995

1993
SIMD Optimizations in a Data Parallel C.
Proceedings of the 1993 International Conference on Parallel Processing, 1993

1992
Parallel Evaluation of Attribute Grammars.
IEEE Trans. Parallel Distrib. Syst., 1992

An introduction to compilation issues for parallel machines.
The Journal of Supercomputing, 1992

1991
Building and Using a Highly Parallel Programmable Logic Array.
IEEE Computer, 1991

1990
SPLASH: A Reconfigurable Linear Logic Array.
Proceedings of the 1990 International Conference on Parallel Processing, 1990

1989
Parallel Evaluation of Attribute Grammars.
Proceedings of the International Conference on Parallel Processing, 1989

1988
Parallel Scheduling of Recursively Defined Arrays.
J. Symb. Comput., 1988

The symbolic hyperplane transformation for recursively defined arrays.
Proceedings of the Proceedings Supercomputing '88, Orlando, FL, USA, November 12-17, 1988, 1988

1987
Exploiting Loop Level Parallelism in Nonprocedural Dataflow Programs.
Proceedings of the International Conference on Parallel Processing, 1987

1986
Macro vs. Micro Dataflow: A Programming Example.
Proceedings of the International Conference on Parallel Processing, 1986


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