Michiaki Emori

According to our database, Michiaki Emori authored at least 6 papers between 1990 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2008

Test Data Compression for Scan-Based BIST Aiming at 100x Compression Rate.

Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki, Tatsuru Matsuo, Takahisa Hiraide, Hideaki Konishi, Michiaki Emori, Takashi Aikyo

IEICE Trans. Inf. Syst., 2008

2006

Test Data Compression of 100x for Scan-Based BIST.

Masayuki Arai, Satoshi Fukumoto, Kazuhiko Iwasaki, Tatsuru Matsuo, Takahisa Hiraide, Hideaki Konishi, Michiaki Emori, Takashi Aikyo

Proceedings of the 2006 IEEE International Test Conference, 2006

The Application of BIST-Aided Scan Test for Real Chips.

Hideaki Konishi, Michiaki Emori, Takahisa Hiraide

Proceedings of the 15th Asian Test Symposium, 2006

2003

BIST-Aided Scan Test - A New Method for Test Cost Reduction.

Takahisa Hiraide, Kwame Osei Boateng, Hideaki Konishi, Koichi Itaya, Michiaki Emori, Hitoshi Yamanaka, Takashi Mochiyama

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

1997

ATREX : Design for Testability System for Mega Gate LSIs.

Michiaki Emori, Junko Kumagai, Koichi Itaya, Takashi Aikyo, Tomoko Anan, Junichi Niimi

Proceedings of the 6th Asian Test Symposium (ATS '97), 17-18 November 1997, 1997

1990

ASIC CAD system based on hierarchical design-for-testability.

Michiaki Emori, Takashi Aikyo, Yasuhide Machida, Jun-ichi Shikatani

Proceedings of the Proceedings IEEE International Test Conference 1990, 1990