Mikael Millberg

According to our database1, Mikael Millberg authored at least 14 papers between 2000 and 2011.

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Bibliography

2011
Architectural Techniques for Improving Performance in Networks on Chip.
PhD thesis, 2011

2009
Priority based forced requeue to reduce worst-case latencies for bursty traffic.
Proceedings of the Design, Automation and Test in Europe, 2009

Flow regulation for on-chip communication.
Proceedings of the Design, Automation and Test in Europe, 2009

2007
A Study of NoC Exit Strategies.
Proceedings of the First International Symposium on Networks-on-Chips, 2007

Increasing NoC Performance and Utilisation using a Dual Packet Exit Strategy.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2004
A study on the implementation of 2-D mesh-based networks-on-chip in the nanometre regime.
Integr., 2004

The Nostrum Backbone - a Communication Protocol Stack for Networks on Chip.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Guaranteed Bandwidth Using Looped Containers in Temporally Disjoint Networks within the Nostrum Network on Chip.
Proceedings of the 2004 Design, 2004

2003
Layout, Performance and Power Trade-Offs in Mesh-Based Network-on-Chip Architectures.
Proceedings of the IFIP VLSI-SoC 2003, 2003

Load Distribution with the Proximity Congestion Awareness in a Network on Chip.
Proceedings of the 2003 Design, 2003

2002
A Network on Chip Architecture and Design Methodology.
Proceedings of the 2002 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002), 2002

FPGA resource and timing estimation from Matlab execution traces.
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002

2000
Image analysis for airborne reconnaissance and missile applications.
Pattern Recognit. Lett., 2000

Implementation Of A Pulse Coupled Neural Network in FPGA.
Int. J. Neural Syst., 2000


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