Mikio Yoneyama

According to our database, Mikio Yoneyama authored at least 7 papers between 1997 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2013

Small and Low-Cost Dual-Rate Optical Triplexer for OLT Transceivers in 10G/1G Co-existing 10G-EPON Systems.

Atsushi Kanda, Akira Ohki, Takeshi Kurosaki, Hiroaki Sanjoh, Kota Asaka, Ryoko Yoshimura, Toshio Ito, Makoto Nakamura, Masafumi Nogawa, Yusuke Ohtomo, Mikio Yoneyama

IEICE Trans. Electron., 2013

10 Gb/s BOSA Employing Low-Cost TO CAN Package and Impedance Matching Circuits in Transmitter.

Kota Asaka, Atsushi Kanda, Akira Ohki, Takeshi Kurosaki, Ryoko Yoshimura, Hiroaki Sanjoh, Toshio Ito, Makoto Nakamura, Mikio Yoneyama

IEICE Trans. Electron., 2013

2004

A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector.

Hideyuki Nosaka, Eiichi Sano, Kiyoshi Ishii, Minoru Ida, Kenji Kurishima, Shoji Yamahata, Tsugumichi Shibata, Hiroyuki Fukuyama, Mikio Yoneyama, Takatomo Enoki, Masahiro Muraguchi

IEEE J. Solid State Circuits, 2004

1999

40-Gbit/s TDM transmission technologies based on ultra-high-speed ICs.

Yutaka Miyamoto, Mikio Yoneyama, Taiichi Otsuji, Kazushige Yonenaga, Naofumi Shimizu

IEEE J. Solid State Circuits, 1999

1998

A 40-Gbit/s superdynamic decision IC fabricated with 0.12-μm GaAs MESFET's.

Koichi Murata, Taiichi Otsuji, Mikio Yoneyama, Masami Tokumitsu

IEEE J. Solid State Circuits, 1998

1997

A super-dynamic flip-flop circuit for broad-band applications up to 24 Gb/s utilizing production-level 0.2-μm GaAs MESFETs.

Taiichi Otsuji, Mikio Yoneyama, Koichi Murata, Eiichi Sano

IEEE J. Solid State Circuits, 1997

40-Gb/s ICs for future lightwave communications systems.

Taiichi Otsuji, Yuhki Imai, Eiichi Sano, Shunji Kimura, Satoshi Yamaguchi, Mikio Yoneyama, Takatomo Enoki, Yohtaro Umeda

IEEE J. Solid State Circuits, 1997