Hideyuki Nosaka

Orcid: 0000-0002-3994-0118

According to our database1, Hideyuki Nosaka authored at least 62 papers between 1997 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Online presence:

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Bibliography

2024
DDS-based Multiphase Local Oscillator Generator for Fast-Beam-Switching Phased-Array Antennas.
Proceedings of the IEEE Radio and Wireless Symposium, 2024

17.4 Environmentally-Friendly Disposable Circuit and Battery System for Reducing Impact of E-Wastes.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
A ROM-Less DDS with Single Current-Switch Array Using Self-Adjusting Two-Step Integrator.
Proceedings of the IEEE Radio and Wireless Symposium, 2023

2022
A Bi-Directional 300-GHz-Band Phased-Array Transceiver in 65-nm CMOS With Outphasing Transmitting Mode and LO Emission Cancellation.
IEEE J. Solid State Circuits, 2022

2021
A 4-GS/s 11.3-mW 7-bit Time-Based ADC With Folding Voltage-to-Time Converter and Pipelined TDC in 65-nm CMOS.
IEEE J. Solid State Circuits, 2021

A 15.1-mW 6-GS/s 6-bit Single-Channel Flash ADC With Selectively Activated 8× Time-Domain Latch Interpolation.
IEEE J. Solid State Circuits, 2021

64QAM wireless link with 300GHz InP-CMOS hybrid transceiver.
IEICE Electron. Express, 2021

22.2 A 300GHz-Band Phased-Array Transceiver Using Bi-Directional Outphasing and Hartley Architecture in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
A Beyond-1-Tb/s Coherent Optical Transmitter Front-End Based on 110-GHz-Bandwidth 2: 1 Analog Multiplexer in 250-nm InP DHBT.
IEEE J. Solid State Circuits, 2020

300-GHz-Band 120-Gb/s Wireless Front-End Based on InP-HEMT PAs and Mixers.
IEEE J. Solid State Circuits, 2020

Design of a 45 Gb/s, 98 fJ/bit, 0.02 mm<sup>2</sup> Transimpedance Amplifier with Peaking-Dedicated Inductor in 65-nm CMOS.
IEICE Trans. Electron., 2020

Entropy and Symbol-Rate Optimized 120 GBaud PS-36QAM Signal Transmission over 2400 km at Net-Rate of 800 Gbps/λ.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2020

Wideband Inline-Amplified WDM Transmission using PPLN-Based OPA with Over-10-THz Bandwidth.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2020

Long-Haul WDM Transmission with Over-1-Tb/s Channels using Electrically Synthesized High-Symbol-Rate Signals.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2020

A 0.57-mW/Gbps, 2ch × 53-Gbps Low-Power PAM4 Transmitter Front-End Flip-Chip-Bonded 1.3-µm LD-Array-on-Si.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2020

Net 321.24-Gb/s IMDD Transmission Based on a >100-GHz Bandwidth Directly-Modulated Laser.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2020

12.3 A 48GHz BW 225mW/ch Linear Driver IC with Stacked Current-Reuse Architecture in 65nm CMOS for Beyond-400Gb/s Coherent Optical Transmitters.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

Ultra-wideband Optical Receiver Using Electrical Spectrum Decomposition Technique.
Proceedings of the European Conference on Optical Communications, 2020

An over 220-GHz-Bandwidth Distributed Active Power Combiner in 250-nm InP DHBT.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2020

230-305 GHz, > 10-dBm-Output-Power Wideband Power Amplifier Using Low-Q Neutralization Technique in 60-nm InP-HEMT Technology.
Proceedings of the IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium, 2020

2019
A wideband current-reuse-RGC TIA circuit with low-power consumption.
IEICE Electron. Express, 2019

A 45 Gb/s, 98 fJ/bit, 0.02 mm<sup>2</sup> Transimpedance Amplifier with Peaking-Dedicated Inductor in 65-nm CMOS.
Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

Digital-Preprocessed Analog-Multiplexed DAC for High-Speed Optical Communications.
Proceedings of the 2019 24th OptoElectronics and Communications Conference (OECC) and 2019 International Conference on Photonics in Switching and Computing (PSC), 2019

1.04 Tbps/Carrier Probabilistically Shaped PDM-64QAM WDM Transmission Over 240 km Based on Electrical Spectrum Synthesis.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

192-Gbaud Signal Generation using Ultra-Broadband Optical Frontend Module Integrated with Bandwidth Multiplexing Function.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

35-Tb/s C-Band Transmission Over 800 km Employing 1-Tb/s PS-64QAM Signals Enhanced by Complex 8 × 2 MIMO Equalizer.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

A 25-Gbps × 4 ch, Low-Power Compact Wire-Bond-Free 3D-Stacked Transmitter Module with 1.3-μm LD-Array-on-Si for On-Board Optics.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

120-GBaud 32QAM Signal Generation using Ultra-Broadband Electrical Bandwidth Doubler.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

A 110-GHz-Bandwidth 2: 1 AMUX-Driver using 250-nm InP DHBTs for Beyond-1-Tb/s/carrier Optical Transmission Systems.
Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019

300-GHz 120-Gb/s Wireless Transceiver with High-Output-Power and High-Gain Power Amplifier Based on 80-nm InP-HEMT Technology.
Proceedings of the 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019

2018
A Summer-Embedded Sense Amplifier for High-Speed Decision Feedback Equalizer.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

A 25-Gb/s 13 mW clock and data recovery using C<sup>2</sup>MOS D-flip-flop in 65-nm CMOS.
Proceedings of the 2018 International Symposium on VLSI Design, 2018

A 137-mW, 4 ch × 25-Gbps Low-Power Compact Transmitter Flip-Chip-Bonded 1.3-μm LD-Array-on-Si.
Proceedings of the Optical Fiber Communications Conference and Exposition, 2018

Transmission of 400-Gbps Discrete Multi-Tone Signal Using >100-GHz-Bandwidth Analog Multiplexer and InP Mach-Zehnder Modulator.
Proceedings of the European Conference on Optical Communication, 2018

A 256-Gbps PAM-4 Signal Generator IC in 0.25-µm InP DHBT Technology.
Proceedings of the 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018

A 15.1-mW 6-GS/s 6-bit Flash ADC with Selectively Activated 8× Time-Domain Interpolation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

A Low Input Referred Noise and Low Crosstalk Noise 25 Gb/s Transimpedance Amplifier with Inductor-Less Bandwidth Compensation.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2017
Session 29 overview: Optical- and electrical-link innovations.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

F5: Wireline transceivers for Mega Data Centers: 50Gb/s and beyond.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

25-Gb/s clock and data recovery IC using latch-load combined with CML buffer circuit for delay generation with 65-nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Ultra-Wideband Digital-to-Analog Conversion Technologies for Tbit/s channel transmission.
Proceedings of the European Conference on Optical Communication, 2017

A 180-mW Linear MZM Driver in CMOS for Single-Carrier 400-Gb/s Coherent Optical Transmitter.
Proceedings of the European Conference on Optical Communication, 2017

2016
An InP-Based 27-GHz-Bandwidth Limiting TIA IC Designed to Suppress Undershoot and Ringing in Its Output Waveform.
IEICE Trans. Electron., 2016

High-performance compound-semiconductor integrated circuits for advanced digital coherent optical communications systems.
IEICE Electron. Express, 2016

F4: Emerging short-reach and high-density interconnect solutions for internet of everything.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
28 Gbaud 16-QAM modulation with compact driver module for InP MZM.
IEICE Electron. Express, 2015

5 × 1-Tb/s PDM-16QAM transmission over 1, 920 km using high-speed InP MUX-DAC integrated module.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

160-Gbps Nyquist PAM4 transmitter using a digital-preprocessed analog-multiplexed DAC.
Proceedings of the European Conference on Optical Communication, 2015

A 25-Gb/s 480-mW CMOS modulator driver using area-efficient 3D inductor peaking.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2012
Wide dynamic range transimpedance amplifier IC for 100-G DP-QPSK optical links using 1-µm InP HBTs.
IEICE Electron. Express, 2012

2011
Ultrahigh-Speed Low-Power DACs Using InP HBTs for Beyond-100-Gb/s/ch Optical Transmission Systems.
IEEE J. Solid State Circuits, 2011

2010
A 24-GS/s 6-bit R-2R Current-Steering DAC in InP HBT Technology.
IEICE Trans. Electron., 2010

2005
High-bit-rate low-power decision circuit using InP-InGaAs HBT technology.
IEEE J. Solid State Circuits, 2005

A 24-Gsps 3-Bit Nyquist ADC Using InP HBTs for DSP-Based Electronic Dispersion Compensation.
IEICE Trans. Electron., 2005

2004
A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector.
IEEE J. Solid State Circuits, 2004

High-bit-rate low-power decision circuit using InP/InGaAs HBT technology [master-slave D-type flip-flop].
Proceedings of the 33rd European Solid-State Circuits Conference, 2004

2003
A 10-Gb/s data-pattern independent clock and data recovery circuit with a two-mode phase comparator.
IEEE J. Solid State Circuits, 2003

A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2002
Low-power 1: 16 DEMUX and one-chip CDR with 1: 4 DEMUX using InP-InGaAs heterojunction bipolar transistors.
IEEE J. Solid State Circuits, 2002

2001
A low-power direct digital synthesizer using a self-adjusting phase-interpolation technique.
IEEE J. Solid State Circuits, 2001

1998
Authors' Reply.
IEEE J. Solid State Circuits, 1998

1997
A direct digital synthesizer with interpolation circuits.
IEEE J. Solid State Circuits, 1997


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