Takatomo Enoki

According to our database, Takatomo Enoki authored at least 16 papers between 1997 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Emitter-metal-related degradation in InP-based HBTs operating at high current density and its suppression by refractory metal.

Yoshino K. Fukai, Kenji Kurishima, Norihide Kashio, Minoru Ida, Shoji Yamahata, Takatomo Enoki

Microelectron. Reliab., 2009

A 125-GHz 140-mW InGaAs/InP composite-channel HEMT MMIC power amplifier module.

Toshihiko Kosugi, Hiroki Sugiyama, Koichi Murata, Hiroyuki Takahashi, Akihiko Hirata, Naoya Kukutsu, Yuichi Kado, Takatomo Enoki

IEICE Electron. Express, 2009

2006

Novel Fabrication Technology for High Yield Sub-100-nm-Gate InP-Based HEMTs.

Hideaki Matsuzaki, Takashi Maruyama, Takatomo Enoki, Masami Tokumitsu

IEICE Trans. Electron., 2006

W-Band Active Integrated Antenna Oscillator Based on Full-Wave Design Methodology and 0.1-µm Gate InP-Based HEMTs.

Koji Inafune, Eiichi Sano, Hideaki Matsuzaki, Toshihiko Kosugi, Takatomo Enoki

IEICE Trans. Electron., 2006

Special Section on Heterostructure Microelectronics with TWHM2005.

Takatomo Enoki

IEICE Trans. Electron., 2006

2005

High-bit-rate low-power decision circuit using InP-InGaAs HBT technology.

Kiyoshi Ishii, Hideyuki Nosaka, Kimikazu Sano, Koichi Murata, Minoru Ida, Kenji Kurishima, Michihiro Hirata, Tsugumichi Shibata, Takatomo Enoki

IEEE J. Solid State Circuits, 2005

2004

A 39-to-45-Gbit/s multi-data-rate clock and data recovery circuit with a robust lock detector.

Hideyuki Nosaka, Eiichi Sano, Kiyoshi Ishii, Minoru Ida, Kenji Kurishima, Shoji Yamahata, Tsugumichi Shibata, Hiroyuki Fukuyama, Mikio Yoneyama, Takatomo Enoki, Masahiro Muraguchi

IEEE J. Solid State Circuits, 2004

100-Gb/s multiplexing and demultiplexing IC operations in InP HEMT technology.

Koichi Murata, Kimikazu Sano, Hiroto Kitabayashi, Suehiro Sugitani, Hirohiko Sugahara, Takatomo Enoki

IEEE J. Solid State Circuits, 2004

Photoreceiver module using an InP HEMT transimpedance amplifier for over 40 gb/s.

Hiroyuki Fukuyama, Kimikazu Sano, Koichi Murata, Hiroto Kitabayashi, Yasuro Yamane, Takatomo Enoki, Hirohiko Sugahara

IEEE J. Solid State Circuits, 2004

Suppression of short-channel effect in pseudomorphic In0.25Al0.75P/In0.75Ga0.25As high electron mobility transistors.

Hideaki Matsuzaki, Hiroki Sugiyama, Haruki Yokoyama, Takashi Kobayashi, Takatomo Enoki

IEICE Electron. Express, 2004

Low-power and High-speed SCFL-inverter Using Pseudomorphic InGaAs Channel High Electron Mobility Transistors.

Hideaki Matsuzaki, Kimikazu Sano, Takatomo Enoki

IEICE Electron. Express, 2004

2003

50-Gb/s 4-b multiplexer/demultiplexer chip set using InP HEMTs.

Kimikazu Sano, Koichi Murata, Suehiro Sugitani, Hirohiko Sugahara, Takatomo Enoki

IEEE J. Solid State Circuits, 2003

A 10-Gb/s data-pattern independent clock and data recovery circuit with a two-mode phase comparator.

Hideyuki Nosaka, Kiyoshi Ishii, Takatomo Enoki, Tsugumichi Shibata

IEEE J. Solid State Circuits, 2003

2002

Low-power 1: 16 DEMUX and one-chip CDR with 1: 4 DEMUX using InP-InGaAs heterojunction bipolar transistors.

Kiyoshi Ishii, Hideyuki Nosaka, Hiroki Nakajima, Kenji Kurishima, Minoru Ida, Noriyuki Watanabe, Yasurou Yamane, Eiichi Sano, Takatomo Enoki

IEEE J. Solid State Circuits, 2002

1998

An 80-Gbit/s multiplexer IC using InAlAs/InGaAs/InP HEMTs.

Taiichi Otsuji, Koichi Murata, Takatomo Enoki, Yohtaro Umeda

IEEE J. Solid State Circuits, 1998

1997

40-Gb/s ICs for future lightwave communications systems.

Taiichi Otsuji, Yuhki Imai, Eiichi Sano, Shunji Kimura, Satoshi Yamaguchi, Mikio Yoneyama, Takatomo Enoki, Yohtaro Umeda

IEEE J. Solid State Circuits, 1997