Ming-Ju Edward Lee

According to our database, Ming-Ju Edward Lee authored at least 12 papers between 2000 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

3.2 The A100 Datacenter GPU and Ampere Architecture.

Jack Choquette, Ming-Ju Edward Lee, Ronny Krashinsky, Vishnu Balan, Brucek Khailany

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2014

A 15-22 Gbps Serial Link in 28 nm CMOS With Direct DFE.

Vishnu Balan, Olakanmi Oluwole, Gregory Kodani, Charlie Zhong, Ratnakar Dadi, Arif Amin, Ahmed Ragab, Ming-Ju Edward Lee

IEEE J. Solid State Circuits, 2014

26.1 A 130mW 20Gb/s half-duplex serial link in 28nm CMOS.

Vishnu Balan, Olakanmi Oluwole, Gregory Kodani, Charlie Zhong, Sanjeev Maheswari, Ratnakar Dadi, Arif Amin, Gautam Bhatia, Peter Mills, Ahmed Ragab, Ming-Ju Edward Lee

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2005

A 20-Gb/s 0.13-μm CMOS serial link transmitter using an LC-PLL to directly drive the output multiplexer.

Patrick Chiang, William J. Dally, Ming-Ju Edward Lee, Ramesh Senthinathan, Yangjin Oh, Mark A. Horowitz

IEEE J. Solid State Circuits, 2005

2004

A 33-mW 8-Gb/s CMOS clock multiplier and CDR for highly integrated I/Os.

Ramin Farjad-Rad, Anhtuyet Nguyen, James Tran, Trey Greer, John Poulton, William J. Dally, John H. Edmondson, Ramesh Senthinathan, Rohit Rathi, Ming-Ju Edward Lee, Hiok-Tiaq Ng

IEEE J. Solid State Circuits, 2004

2003

A second-order semidigital clock recovery circuit based on injection locking.

Hiok-Tiaq Ng, Ramin Farjad-Rad, Ming-Ju Edward Lee, William J. Dally, Trey Greer, John Poulton, John H. Edmondson, Rohit Rathi, Ramesh Senthinathan

IEEE J. Solid State Circuits, 2003

Jitter transfer characteristics of delay-locked loops - theories and design techniques.

Ming-Ju Edward Lee, William J. Dally, Trey Greer, Hiok-Tiaq Ng, Ramin Farjad-Rad, John Poulton, Ramesh Senthinathan

IEEE J. Solid State Circuits, 2003

CMOS High-Speed I/Os - Present and Future.

Ming-Ju Edward Lee, William J. Dally, Ramin Farjad-Rad, Hiok-Tiaq Ng, Ramesh Senthinathan, John H. Edmondson, John W. Poulton

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

A 33mW 8Gb/s CMOS clock multiplier and CDR for highly integrated I/Os.

Hiok-Tiaq Ng, Ming-Ju Edward Lee, Ramin Farjad-Rad, Ramesh Senthinathan, William J. Dally, Anhtuyet Nguyen, Rohit Rathi, Trey Greer, John Poulton, John H. Edmondson, James Tran

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips.

Ramin Farjad-Rad, William J. Dally, Hiok-Tiaq Ng, Ramesh Senthinathan, Ming-Ju Edward Lee, Rohit Rathi, John Poulton

IEEE J. Solid State Circuits, 2002

2001

Monolithic chaotic communications system.

Patrick Chiang, William J. Dally, Ming-Ju Edward Lee

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

Low-power area-efficient high-speed I/O circuit techniques.

Ming-Ju Edward Lee, William J. Dally, Patrick Chiang

IEEE J. Solid State Circuits, 2000