Minhan Chen

According to our database1, Minhan Chen authored at least 5 papers between 1998 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
A Reduced-Fractional-Spur DPLL Based on Cyclic Single-Delay-Pair Vernier TDC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023
Reference Clock Jitter Immunity by Accurate DPLL Bandwidth Control in a Multiple-link Die-to-Die Interface.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
An adaptive wide-range Time-to-Digital Converter with flexible resolution for DPLL applications.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

A Low-Ripple Resistor-Less Hybrid Loop Filter based PLL in 3nm FinFET.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

1998
Simulation of Quantum-Dot Structures in Si/SiO<sub>2</sub>.
VLSI Design, 1998


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