Mitsuho Seki

According to our database1, Mitsuho Seki authored at least 6 papers between 1990 and 1998.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1998
Design Methodology of a 200MHz Superscalar Microprocessor: SH-4.
Proceedings of the 35th Conference on Design Automation, 1998

1996
A practical clock router that accounts for the capacitance derived from parallel and cross segments.
Proceedings of the conference on European design automation, 1996

1994
A specified delay accomplishing clock router using multiple layers.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993
A New Floorplan Simultaneously Placing Blocks over Two Logic Layers for Sea-of-gate Gate Arrays.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1991
Timing-Oriented Routers for PCB Layout Design of High-Performance Computers.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990
LSI module placement methods using neural computation networks.
Proceedings of the IJCNN 1990, 1990


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