Tsuyoshi Takahashi

According to our database1, Tsuyoshi Takahashi authored at least 14 papers between 1984 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


Characterization and Modeling of a GaAsSb/InGaAs Backward Diode on the Basis of S-Parameter Measurement Up to 67 GHz.
IEICE Trans. Electron., 2019

Shadow Removing Method for Lip Shape Extraction Using Feedforward Neural Network.
Proceedings of the IEEE 1st Global Conference on Life Sciences and Technologies, 2019

Adaptive Learning Method in Facial Expression Recognition Model Using Fuzzy-ART.
Proceedings of the IEEE 1st Global Conference on Life Sciences and Technologies, 2019

Highly Sensitive p-GaAsSb/n-InAs Nanowire Backward Diodes for Low-Power Microwaves.
Proceedings of the 49th European Solid-State Device Research Conference, 2019

300-GHz Amplifier in 75-nm InP HEMT Technology.
IEICE Trans. Electron., 2016

Beyond 110 GHz InP-HEMT Based Mixer Module Using Flip-Chip Assembly for Precise Spectrum Analysis.
IEICE Trans. Electron., 2015

A study of learning data size for automatic face area detection in sequential thermal images.
Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015

Evaluation of Wake-on-Demand Accurate Activation and In-Vehicle Wireless Connecation Control.
Proceedings of the 10th International Conference on Broadband and Wireless Computing, 2015

Support Vector Regression-Based Data Integration Method for Multipath Ultrasonic Flowmeter.
IEEE Trans. Instrum. Meas., 2014

Submillimeter-wave InP HEMT amplifiers with current-reuse topology.
Proceedings of the 2013 IEEE Radio and Wireless Symposium, 2013

Relationship between physical conditions and lip motion change arising due to amusement feeling.
Proceedings of the IEEE 2nd Global Conference on Consumer Electronics, 2013

A 50-Gbit/s 450-mW Full-Rate 4: 1 Multiplexer With Multiphase Clock Architecture in 0.13-µm InP HEMT Technology.
IEEE J. Solid State Circuits, 2007

Design Methodology of a 200MHz Superscalar Microprocessor: SH-4.
Proceedings of the 35th Conference on Design Automation, 1998

An MOS digital network model on a modified thevenin equivalent for logic simulation.
Proceedings of the 21st Design Automation Conference, 1984