Monir Zaman

According to our database, Monir Zaman authored at least 6 papers between 2015 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Hunting Security Bugs in SoC Designs: Lessons Learned.

Mohammad-Mahdi Bidmeshki, Yunjie Zhang, Monir Zaman, Liwei Zhou, Yiorgos Makris

IEEE Des. Test, 2021

2020

DECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY.

Jianqi Chen, Monir Zaman, Yiorgos Makris, R. D. Shawn Blanton, Subhasish Mitra, Benjamin Carrión Schäfer

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

CAPE: A cross-layer framework for accurate microprocessor power estimation.

Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris

Integr., 2019

2018

Towards a Cross-Layer Framework for Accurate Power Modeling of Microprocessor Designs.

Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris

Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

Towards provably-secure performance locking.

Monir Zaman, Abhrajit Sengupta, Danqing Liu, Ozgur Sinanoglu, Yiorgos Makris, Jeyavijayan (JV) Rajendran

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2015

Workload characterization and prediction: A pathway to reliable multi-core systems.

Monir Zaman, Ali Ahmadi, Yiorgos Makris

Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015