Nan Sun

Affiliations:
  • University of Texas, Austin, Department of Electrical and Computer Engineering, Austin, TX, USA


According to our database1, Nan Sun authored at least 32 papers between 2007 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2019
Introduction to the Special Section on the 2018 Custom Integrated Circuits Conference.
IEEE J. Solid State Circuits, 2019

2018
A 6-bit 0.81-mW 700-MS/s SAR ADC With Sparkle-Code Correction, Resolution Enhancement, and Background Window Width Calibration.
IEEE J. Solid State Circuits, 2018

A 10-b 600-MS/s 2-way time-interleaved SAR ADC with mean absolute deviation based background timing-skew calibration.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
A Fully Passive Compressive Sensing SAR ADC for Low-Power Wireless Sensors.
IEEE J. Solid State Circuits, 2017

A 6-bit 0.81mW 700-MS/s SAR ADC with sparkle-code correction, resolution enhancement, and background window width calibration.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
A 12b-ENOB 61µW noise-shaping SAR ADC with a passive integrator.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

A 9.8b-ENOB 5.5fJ/step fully-passive compressive sensing SAR ADC for WSN applications.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
An Area- and Power-Efficient I<sub>ref</sub> Compensation Technique for Voltage-Mode R-2R DACs.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A Scaling-Friendly Low-Power Small-Area ΔΣ ADC With VCO-Based Integrator and Intrinsic Mismatch Shaping Capability.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

Ultra-low power multi-channel data conversion with a single SAR ADC for mobile sensing applications.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
Analog signal processing in deep submicron CMOS technologies using inverters.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A purely-VCO-based single-loop high-order continuous-time ΣΔ ADC.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A random DEM technique with minimal element transition rate for high-speed DACs.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
A 1.2 mW 67.5 dB SQDR VCO-based ΣΔ ADC with Non-linearity Cancellation Technique.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 10MHz-BW, 5.6mW, 70dB SNDR ΔΣ ADC using VCO-based integrators with intrinsic DEM.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A frequency-folded ADC architecture with digital LO synthesis.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A 1.8mW 2MHz-BW 66.5dB-SNDR ΔΣ ADC using VCO-based integrators with intrinsic CLA.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
Exploiting Process Variation and Noise in Comparators to Calibrate Interstage Gain Nonlinearity in Pipelined ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

High-Order Mismatch-Shaped Segmented Multibit ΔΣ DACs With Arbitrary Unit Weights.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Multi-Channel Sparse Data Conversion With a Single Analog-to-Digital Converter.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012

Solid-state and biological systems interface.
Proceedings of the 38th European Solid-State Circuit conference, 2012

A 2.9-mW 11-b 20-MS/s pipelined ADC with dual-mode-based digital background calibration.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
Low-Complexity High-Order Vector-Based Mismatch Shaping in Multibit ΔΣ ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

High-Order Mismatch-Shaping in Multibit DACs.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

Palm NMR and 1-Chip NMR.
IEEE J. Solid State Circuits, 2011

2010
Palm NMR and one-chip NMR.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
CMOS RF Biosensor Utilizing Nuclear Magnetic Resonance.
IEEE J. Solid State Circuits, 2009

2008
Digital Background Calibration in Pipelined ADCs Using Commutated Feedback Capacitor Switching.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Authors' Response [to comments on "On the self-generation of electrical soliton pulses"].
IEEE J. Solid State Circuits, 2008

CMOS Mini Nuclear Magnetic Resonance System and its Application for Biomolecular Sensing.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007
On the Self-Generation of Electrical Soliton Pulses.
IEEE J. Solid State Circuits, 2007


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