Xiankun Jin

Orcid: 0000-0002-6519-979X

According to our database1, Xiankun Jin authored at least 7 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2023
Innovation Practices Track: Silicon Lifecycle Management Challenges and Opportunities.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023

Enhanced ML-Based Approach for Functional Safety Improvement in Automotive AMS Circuits.
Proceedings of the IEEE International Test Conference, 2023

2022
Low Cost High Accuracy Stimulus Generator for On-chip Spectral Testing.
Proceedings of the IEEE International Test Conference, 2022

2021
Fast Gate Leakage Current Monitor With Large Dynamic Range.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

2018
USER-SMILE: Ultrafast Stimulus Error Removal and Segmented Model Identification of Linearity Errors for ADC Built-in Self-Test.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017
An on-chip ADC BIST solution and the BIST enabled calibration scheme.
Proceedings of the IEEE International Test Conference, 2017

2014
Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014


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