Kyoungtae Lee

Orcid: 0000-0002-4605-1415

According to our database1, Kyoungtae Lee authored at least 16 papers between 2013 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2022
A Highly Energy-Efficient Hyperdimensional Computing Processor for Biosignal Classification.
IEEE Trans. Biomed. Circuits Syst., 2022

An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022

A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2021
8 An Output-Bandwidth-Optimized 200Gb/s PAM-4 100Gb/s NRZ Transmitter with 5-Tap FFE in 28nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

A Highly Energy-Efficient Hyperdimensional Computing Processor for Wearable Multi-Modal Classification.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, BioCAS 2021, 2021

2020
A Millimeter-Scale Single Charged Particle Dosimeter for Cancer Radiotherapy.
IEEE J. Solid State Circuits, 2020

34.1 A 64×64 Implantable Real-Time Single-Charged-Particle Radiation Detector for Cancer Therapy.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs.
IEICE Trans. Electron., 2019

2017
A six-port modulator based RF transmission system: Application in an OFDM environment.
Proceedings of the IEEE International Conference on Communications, 2017

2016
Feasibility study and spatial-temporal characteristics analysis for 28 GHz outdoor wireless channel modelling.
IET Commun., 2016

2015
A Scaling-Friendly Low-Power Small-Area ΔΣ ADC With VCO-Based Integrator and Intrinsic Mismatch Shaping Capability.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

A 0.04-mm<sup>2</sup> 0.9-mW 71-dB SNDR distributed modular AS ADC with VCO-based integrator and digital DAC calibration.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
A purely-VCO-based single-loop high-order continuous-time ΣΔ ADC.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
A 10MHz-BW, 5.6mW, 70dB SNDR ΔΣ ADC using VCO-based integrators with intrinsic DEM.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

A 1.8mW 2MHz-BW 66.5dB-SNDR ΔΣ ADC using VCO-based integrators with intrinsic CLA.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013


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