Neil Vachharajani

According to our database¹, Neil Vachharajani authored at least 33 papers between 2002 and 2015.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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On csauthors.net:

Bibliography

2015

Purity: Building Fast, Highly-Available Enterprise Flash Storage from Commodity Components.

[BibT_eX]

[DOI]

Proceedings of the 2015 ACM SIGMOD International Conference on Management of Data, Melbourne, Victoria, Australia, May 31, 2015

2013

Taming Hardware Event Samples for Precise and Versatile Feedback Directed Optimizations.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2013

Flash in an enterprise storage array - 10x performance for less than disk.

[BibT_eX]

[DOI]

Neil Vachharajani

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

2011

Hardware Performance Monitoring for the Rest of Us: A Position and Survey.

[BibT_eX]

[DOI]

Tipp Moseley

Neil Vachharajani

William Jalby

Proceedings of the Network and Parallel Computing - 8th IFIP International Conference, 2011

The impact of memory subsystem resource sharing on datacenter applications.

[BibT_eX]

[DOI]

Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

RACEZ: a lightweight and non-invasive race detection tool for production applications.

[BibT_eX]

[DOI]

Proceedings of the 33rd International Conference on Software Engineering, 2011

MAO - An extensible micro-architectural optimizer.

[BibT_eX]

[DOI]

Proceedings of the CGO 2011, 2011

2010

Contention aware execution: online contention detection and response.

[BibT_eX]

[DOI]

Proceedings of the CGO 2010, 2010

Taming hardware event samples for FDO compilation.

[BibT_eX]

[DOI]

Proceedings of the CGO 2010, 2010

2008

Speculation.

[BibT_eX]

[DOI]

David I. August

Neil Vachharajani

Proceedings of the Wiley Encyclopedia of Computer Science and Engineering, 2008

Performance scalability of decoupled software pipelining.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2008

Revisiting the Sequential Programming Model for the Multicore Era.

[BibT_eX]

[DOI]

IEEE Micro, 2008

Spice: speculative parallel iteration chunk execution.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Symposium on Code Generation and Optimization (CGO 2008), 2008

2007

UNISIM: An Open Simulation Environment and Library for Complex Architecture Design and Collaborative Development.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2007

Shape analysis with inductive recursion synthesis.

[BibT_eX]

[DOI]

Bolei Guo

Neil Vachharajani

David I. August

Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation, 2007

Revisiting the Sequential Programming Model for Multi-Core.

[BibT_eX]

[DOI]

Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

Speculative Decoupled Software Pipelining.

[BibT_eX]

[DOI]

Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006

The Liberty Simulation Environment: A deliberate approach to high-level system modeling.

[BibT_eX]

[DOI]

ACM Trans. Comput. Syst., 2006

Automatic instruction scheduler retargeting by reverse-engineering.

[BibT_eX]

[DOI]

Proceedings of the ACM SIGPLAN 2006 Conference on Programming Language Design and Implementation, 2006

Support for High-Frequency Streaming in CMPs.

[BibT_eX]

[DOI]

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

Selective Runtime Memory Disambiguation in a Dynamic Binary Translator.

[BibT_eX]

[DOI]

Proceedings of the Compiler Construction, 15th International Conference, 2006

2005

Software-controlled fault tolerance.

[BibT_eX]

[DOI]

Shubhendu S. Mukherjee

ACM Trans. Archit. Code Optim., 2005

Chip multi-processor scalability for single-threaded applications.

[BibT_eX]

[DOI]

SIGARCH Comput. Archit. News, 2005

Design and Evaluation of Hybrid Fault-Detection Systems.

[BibT_eX]

[DOI]

Shubhendu S. Mukherjee

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

SWIFT: Software Implemented Fault Tolerance.

[BibT_eX]

[DOI]

Proceedings of the 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 2005

2004

The Liberty Simulation Environment, version 1.0.

[BibT_eX]

[DOI]

SIGMETRICS Perform. Evaluation Rev., 2004

The liberty structural specification language: a high-level modeling language for component reuse.

[BibT_eX]

[DOI]

Manish Vachharajani

Neil Vachharajani

David I. August

Proceedings of the ACM SIGPLAN 2004 Conference on Programming Language Design and Implementation 2004, 2004

RIFLE: An Architectural Framework for User-Centric Information-Flow Security.

[BibT_eX]

[DOI]

Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

Facilitating reuse in hardware models with enhanced type inference.

[BibT_eX]

[DOI]

Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

Decoupled Software Pipelining with the Synchronization Array.

[BibT_eX]

[DOI]

Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September, 2004

2003

The liberty simulation environment as a pedagogical tool.

[BibT_eX]

[DOI]

Proceedings of the 2003 workshop on Computer architecture education, 2003

Compiler Optimization-Space Exploration.

[BibT_eX]

[DOI]

Spyridon Triantafyllis

Manish Vachharajani

Neil Vachharajani

David I. August

Proceedings of the 1st IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2003), 2003

2002

Microarchitectural exploration with Liberty.

[BibT_eX]

[DOI]

Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

Neil Vachharajani

Timeline

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