Niteen Patkar

According to our database, Niteen Patkar authored at least 5 papers between 1995 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

Testing of Vega2, a chip multi-processor with spare processors.

Samy Makar, Tony Altinis, Niteen Patkar, Janet Wu

Proceedings of the 2007 IEEE International Test Conference, 2007

1995

SPARC64: a 64-b 64-active-instruction out-of-order-execution MCM processor.

Ted Williams, Niteen Patkar, Gene Shen

IEEE J. Solid State Circuits, November, 1995

Implementation Trade-Offs in Using a Restricted Data Flow Architecture in a High Performance RISC Microprocessor.

Mike Simone, A. Essen, A. Ike, A. Krishnamoorthy, Tak Maruyama, Niteen Patkar, M. Ramaswami, Michael Shebanow, V. Thirumalaiswamy, DeForest Tovey

Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

Error Detection and Handling in a Superscalar, Speculative Out-of-Order Execution Processor System.

Nirmal R. Saxena, Chien Chen, Ravi Swami, Hideki Osone, Shalesh Thusoo, David Lyon, David Chang, Anand Dharmaraj, Niteen Patkar, Yizhi Lu, Ben Chia

Proceedings of the Digest of Papers: FTCS-25, 1995

Microarchitecture of HaL's CPU.

Niteen Patkar, Akira Katsuno, Simon Li, Tak Maruyama, Sunil Savkar, Mike Simone, Gene Shen, Ravi Swami, DeForest Tovey

Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995