Noel Eisley

According to our database, Noel Eisley authored at least 10 papers between 2004 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2012

The IBM Blue Gene/Q Interconnection Fabric.

Dong Chen, Noel Eisley, Philip Heidelberger, Robert M. Senger, Yutaka Sugawara, Sameer Kumar, Valentina Salapura, David L. Satterfield, Burkhard D. Steinmacher-Burow, Jeffrey J. Parker

IEEE Micro, 2012

Looking under the hood of the IBM blue gene/Q network.

Dong Chen, Noel Eisley, Philip Heidelberger, Sameer Kumar, Amith R. Mamidala, Fabrizio Petrini, Robert M. Senger, Yutaka Sugawara, Robert Walkup, Burkhard D. Steinmacher-Burow, Anamitra R. Choudhury, Yogish Sabharwal, Swati Singhal, Jeffrey J. Parker

Proceedings of the SC Conference on High Performance Computing Networking, 2012

2011

The IBM Blue Gene/Q interconnection network and message unit.

Dong Chen, Noel Eisley, Philip Heidelberger, Robert M. Senger, Yutaka Sugawara, Sameer Kumar, Valentina Salapura, David L. Satterfield, Burkhard D. Steinmacher-Burow, Jeffrey J. Parker

Proceedings of the Conference on High Performance Computing Networking, 2011

2008

Leveraging on-chip networks for data cache migration in chip multiprocessors.

Noel Eisley, Li-Shiuan Peh, Li Shang

Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008

2007

Polaris: A System-Level Roadmapping Toolchain for On-Chip Interconnection Networks.

Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin Li, Li-Shiuan Peh

IEEE Trans. Very Large Scale Integr. Syst., 2007

Software-directed power-aware interconnection networks.

Vassos Soteriou, Noel Eisley, Li-Shiuan Peh

ACM Trans. Archit. Code Optim., 2007

2006

In-network cache coherence.

Noel Eisley, Li-Shiuan Peh, Li Shang

IEEE Comput. Archit. Lett., 2006

Polaris: A System-Level Roadmap for On-Chip Interconnection Networks.

Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin Li, Li-Shiuan Peh

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

High-level power analysis for multi-core chips.

Noel Eisley, Vassos Soteriou, Li-Shiuan Peh

Proceedings of the 2006 International Conference on Compilers, 2006

2004

High-level power analysis for on-chip networks.

Noel Eisley, Li-Shiuan Peh

Proceedings of the 2004 International Conference on Compilers, 2004