Yutaka Sugawara

Orcid: 0000-0002-8116-5346

According to our database1, Yutaka Sugawara authored at least 19 papers between 2004 and 2023.

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Bibliography

2023
Data Movement Accelerator Engines on a Prototype Power10 Processor.
IEEE Micro, 2023

2016
An Evaluation of Network Architectures for Next Generation Supercomputers.
Proceedings of the 7th International Workshop on Performance Modeling, 2016

2014
Soft error resiliency characterization and improvement on IBM BlueGene/Q processor using accelerated proton irradiation.
Proceedings of the 2014 International Test Conference, 2014

Soft Error Resiliency Characterization on IBM BlueGene/Q Processor.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
Design for low power and power management in IBM Blue Gene/Q.
IBM J. Res. Dev., 2013

Application-level power and performance characterization and optimization on IBM Blue Gene/Q systems.
IBM J. Res. Dev., 2013

2012
The IBM Blue Gene/Q Interconnection Fabric.
IEEE Micro, 2012

Looking under the hood of the IBM blue gene/Q network.
Proceedings of the SC Conference on High Performance Computing Networking, 2012

2011
The performance of GRAPE-DR for dense matrix operations.
Proceedings of the International Conference on Computational Science, 2011

The IBM Blue Gene/Q interconnection network and message unit.
Proceedings of the Conference on High Performance Computing Networking, 2011

2008
Performance optimization of TCP/IP over 10 gigabit ethernet by precise instrumentation.
Proceedings of the ACM/IEEE Conference on High Performance Computing, 2008

Effect of Parallel TCP Stream Equalizer on Real Long Fat-pipe Network.
Proceedings of The Seventh IEEE International Symposium on Networking Computing and Applications, 2008

Effect of Packet Shuffler on Parallel TCP Stream Network.
Proceedings of the Seventh International Conference on Networking (ICN 2008), 2008

CVC: The C to RTL compiler for callback-based verification model.
Proceedings of the FPL 2008, 2008

MCAMP: communication optimization on massively parallel machines with hierarchical scratch-pad memory.
Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008

2007
Flow Balancing Hardware for Parallel TCP Streams on Long Fat Pipe Network.
Proceedings of the Future Generation Communication and Networking, 2007

2005
High-speed and Memory Efficient TCP Stream Scanning using FPGA.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
A computer architecture education curriculum through the design and implementation of original processors using FPGAs.
Proceedings of the 2004 workshop on Computer architecture education, 2004

Over 10Gbps String Matching Mechanism for Multi-stream Packet Scanning Systems.
Proceedings of the Field Programmable Logic and Application, 2004


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