Vassos Soteriou
Orcid: 0000-0002-2818-0459
According to our database1,
Vassos Soteriou
authored at least 45 papers
between 2003 and 2023.
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Bibliography
2023
Workload Characterization and Traffic Analysis for Reconfigurable Intelligent Surfaces Within 6G Wireless Systems.
IEEE Trans. Mob. Comput., May, 2023
2022
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022
2021
2020
IEEE Trans. Computers, 2020
J. Syst. Archit., 2020
Toward Fault-Tolerant Deadlock-Free Routing in HyperSurface-Embedded Controller Networks.
IEEE Netw. Lett., 2020
Design of a Near-Ideal Fault-Tolerant Routing Algorithm for Network-on-Chip-Based Multicores.
CoRR, 2020
2019
Toward data-driven architectural support in improving the performance of future HPC architectures.
Parallel Comput., 2019
An Interposer-Based Root of Trust: Seize the Opportunity for Secure System-Level Integration of Untrusted Chiplets.
CoRR, 2019
2018
Proceedings of the 11th International Workshop on Network on Chip Architectures, 2018
2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017
2016
A Holistic Approach Towards Intelligent Hotspot Prevention in Network-on-Chip-Based Multicores.
IEEE Trans. Computers, 2016
2015
Use It or Lose It: Proactive, Deterministic Longevity in Future Chip Multiprocessors.
ACM Trans. Design Autom. Electr. Syst., 2015
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
Designing High-Performance, Power-Efficient NoCs With Embedded Silicon-in-Silica Nanophotonics.
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Design of high-performance, power-efficient optical NoCs using Silica-embedded silicon nanophotonics.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
Towards High-Performance and Power-Efficient Optical NoCs Using Silicon-in-Silica Photonic Components.
Proceedings of the Ninth International Workshop on Interconnection Network Architectures: On-Chip, 2015
2014
Hermes: Architecting a top-performing fault-tolerant routing algorithm for Networks-on-Chips.
Proceedings of the Eighth IEEE/ACM International Symposium on Networks-on-Chip, 2014
Hermes: Architecting a top-performing fault-tolerant routing algorithm for Networks-on-Chips.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014
Up by their bootstraps: Online learning in Artificial Neural Networks for CMP uncore power management.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014
2013
Dynamic fault-tolerant routing algorithm for networks-on-chip based on localised detouring paths.
IET Comput. Digit. Tech., 2013
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013
2012
A Dynamically Adjusting Gracefully Degrading Link-Level Fault-Tolerant Mechanism for NoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
J. Electr. Comput. Eng., 2012
Virtualizing Virtual Channels for Increased Network-on-Chip Robustness and Upgradeability.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
HPRA: A pro-active Hotspot-Preventive high-performance routing algorithm for Networks-on-Chips.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012
A highly robust distributed fault-tolerant routing algorithm for NoCs with localized rerouting.
Proceedings of the 2012 Interconnection Network Architecture, 2012
2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
2010
Proceedings of the NOCS 2010, 2010
Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010
Proceedings of the 28th International Conference on Computer Design, 2010
2009
IEEE Comput. Archit. Lett., 2009
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
Exploring the Design Space of Self-Regulating Power-Aware On/Off Interconnection Networks.
IEEE Trans. Parallel Distributed Syst., 2007
ACM Trans. Archit. Code Optim., 2007
2006
Proceedings of the 14th International Symposium on Modeling, 2006
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
Proceedings of the 2006 International Conference on Compilers, 2006
2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
2003
Dynamic power management for power optimization of interconnection networks using on/off links.
Proceedings of the 11th Annual IEEE Symposium on High Performance Interconnects, 2003