Nozomu Harada

According to our database, Nozomu Harada authored at least 5 papers between 2003 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

Dynamic Flash Memory Operation Experimentally Validated with 65nm SOI Technology.

Koji Sakui, Daniele Garbin, Yoshihisa Iwata, Gautam Gaddemane, Yisuo Li, Yiqun Wan, Ken'ichi Kanazawa, Eyup Can Demir, Iwao Kunishima, Andrea Fantini, Masakazu Kakumu, Christophe Lorant, Nozomu Harada

Proceedings of the IEEE International Memory Workshop, 2025

2022

Dynamic Flash Memory with Fast Block Refresh.

Koji Sakui, Masakazu Kakumu, Nozomu Harada

Proceedings of the 20th Non-Volatile Memory Technology Symposium, 2022

2021

Dynamic Flash Memory with Dual Gate Surrounding Gate Transistor (SGT).

Koji Sakui, Nozomu Harada

Proceedings of the IEEE International Memory Workshop, 2021

1.5-nm Node Surrounding Gate Transistor (SGT)-SRAM Cell with Staggered Pillar and Self-Aligned Process for Gate, Bottom Contact, and Pillar.

Yisuo Li, Ken'ichi Kanazawa, Tetsuo Izawa, Koji Sakui, Georg Strof, Oskar Baumgartner, Gerhard Rzepa, Markus Karner, Zlatan Stanojevic, Nozomu Harada, Fujio Masuoka

Proceedings of the IEEE International Memory Workshop, 2021

2003

Development of a hyper dynamic manipulator utilizing joint stops.

Aiguo Ming, Nozomu Harada, Makoto Shimojo, Makoto Kajitani

Proceedings of the 2003 IEEE/RSJ International Conference on Intelligent Robots and Systems, Las Vegas, Nevada, USA, October 27, 2003