Nuo Xu

Orcid: 0000-0003-1224-7345

According to our database¹, Nuo Xu authored at least 9 papers between 2020 and 2025.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Bibliography

2025

ILOSSS - Improved Logic Synthesis based on Several Stateful Logic Gates.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., July, 2025

2023

AIMCU-MESO: An In-Memory Computing Unit Constructed by MESO Device.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., January, 2023

Rescuing ReRAM-based Neural Computing Systems from Device Variation.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., January, 2023

2022

A 625kHz-BW, 79.3dB-SNDR Second-Order Noise-Shaping SAR ADC Using High-Efficiency Error-Feedback Structure.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

MESO-LUT: A design approach of look up tables based on MESO devices.

[BibT_eX]

[DOI]

Microelectron. J., 2022

Error Detection and Correction Method Toward Fully Memristive Stateful Logic Design.

[BibT_eX]

[DOI]

Adv. Intell. Syst., 2022

2021

HDNH: a read-efficient and write-optimized hashing scheme for hybrid DRAM-NVM memory.

[BibT_eX]

[DOI]

Proceedings of the ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9, 2021

2020

A forming-free ReRAM cell with low operating voltage.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2020

A Stateful Logic Family Based on a New Logic Primitive Circuit Composed of Two Antiparallel Bipolar Memristors.

[BibT_eX]

[DOI]

Adv. Intell. Syst., 2020

Nuo Xu

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