Nuo Xu

According to our database, Nuo Xu authored at least 11 papers between 2020 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 16-bit 2MSPS pipelined SAR ADC with digital background calibration in 0.18 μm CMOS.

Nuo Xu, Yuhua Liang

Microelectron. J., 2026

2025

ILOSSS - Improved Logic Synthesis based on Several Stateful Logic Gates.

Nuo Xu, Yihong Hu, Chaochao Feng, Wei Tong, Kang Liu, Liang Fang

ACM Trans. Design Autom. Electr. Syst., July, 2025

2024

LOSSS-Logic Synthesis based on Several Stateful logic gates for high time-efficient computing.

Yihong Hu, Nuo Xu, Chaochao Feng, Wei Tong, Kang Liu, Liang Fang

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023

AIMCU-MESO: An In-Memory Computing Unit Constructed by MESO Device.

Junwei Zeng, Nuo Xu, Yabo Chen, Chenglong Huang, Zhiwei Li, Liang Fang

ACM Trans. Design Autom. Electr. Syst., January, 2023

Rescuing ReRAM-based Neural Computing Systems from Device Variation.

Chenglong Huang, Nuo Xu, Junwei Zeng, Wenqing Wang, Yihong Hu, Liang Fang, Desheng Ma, Yanting Chen

ACM Trans. Design Autom. Electr. Syst., January, 2023

2022

A 625kHz-BW, 79.3dB-SNDR Second-Order Noise-Shaping SAR ADC Using High-Efficiency Error-Feedback Structure.

Pinyun Yi, Yuhua Liang, Shubin Liu, Nuo Xu, Liang Fang, Yue Hao

IEEE Trans. Circuits Syst. II Express Briefs, 2022

MESO-LUT: A design approach of look up tables based on MESO devices.

Junwei Zeng, Nuo Xu, Cheng Li, Desheng Ma, Chenglong Huang, Wenqing Wang, Yihong Hu, Liang Fang

Microelectron. J., 2022

Error Detection and Correction Method Toward Fully Memristive Stateful Logic Design.

Zhiwei Li, Hongchang Long, Xi Zhu, Yinan Wang, Haijun Liu, Qingjiang Li, Nuo Xu, Hui Xu

Adv. Intell. Syst., 2022

2021

HDNH: a read-efficient and write-optimized hashing scheme for hybrid DRAM-NVM memory.

Junhao Zhu, Kaixin Huang, Xiaomin Zou, Chenglong Huang, Nuo Xu, Liang Fang

Proceedings of the ICPP 2021: 50th International Conference on Parallel Processing, Lemont, IL, USA, August 9, 2021

2020

A forming-free ReRAM cell with low operating voltage.

Binbin Yang, Nuo Xu, Cheng Li, Chenglong Huang, Desheng Ma, Jiahao Liu, Daniel Arumí, Liang Fang

IEICE Electron. Express, 2020

A Stateful Logic Family Based on a New Logic Primitive Circuit Composed of Two Antiparallel Bipolar Memristors.

Nuo Xu, Tae Gyun Park, Hae Jin Kim, Xinglong Shao, Kyung Jean Yoon, Tae Hyung Park, Liang Fang, Kyung Min Kim, Cheol Seong Hwang

Adv. Intell. Syst., 2020