Octavio Nieto-Taladriz

According to our database1, Octavio Nieto-Taladriz authored at least 40 papers between 1993 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 


On csauthors.net:


A Security Scheme for Wireless Sensor Networks.
Proceedings of the 2016 IEEE Global Communications Conference, 2016

A Game Theory Based Strategy for Reducing Energy Consumption in Cognitive WSN.
Int. J. Distributed Sens. Networks, 2014

Bio-inspired enhancement of reputation systems for intelligent environments.
Inf. Sci., 2013

ICT and power: new challenges and solutions.
Int. J. Reason. based Intell. Syst., 2013

PUE Attack Detection in CWSN Using Collaboration and Learning Behavior.
Int. J. Distributed Sens. Networks, 2013

Evaluation, Energy Optimization, and Spectrum Analysis of an Artificial Noise Technique to Improve CWSN Security.
Int. J. Distributed Sens. Networks, 2013

Wireless Measurement System for Structural Health Monitoring With High Time-Synchronization Accuracy.
IEEE Trans. Instrum. Meas., 2012

Using clustering techniques for intelligent camera-based user interfaces.
Log. J. IGPL, 2012

Artificial noise scheme to ensure secure communications in CWSN.
Proceedings of the 8th International Wireless Communications and Mobile Computing Conference, 2012

Improving security in WMNs with reputation systems and self-organizing maps.
J. Netw. Comput. Appl., 2011

Forecasting Based on Short Time Series Using ANNs and Grey Theory - Some Basic Comparisons.
Proceedings of the Advances in Computational Intelligence, 2011

Using Self-Organizing Maps for Intelligent Camera-Based User Interfaces.
Proceedings of the Hybrid Artificial Intelligence Systems, 5th International Conference, 2010

Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs.
Int. J. Reconfigurable Comput., 2009

A Scalable Security Framework for Reliable AmI Applications Based on Untrusted Sensors.
Proceedings of the Wired/Wireless Internet Communications, 7th International Conference, 2009

Modular Framework for Smart Home Applications.
Proceedings of the Distributed Computing, 2009

SORU: A Reconfigurable Vector Unit for Adaptable Embedded Systems.
Proceedings of the Reconfigurable Computing: Architectures, 2009

Fast and accurate computation of the roundoff noise of linear time-invariant systems.
IET Circuits Devices Syst., 2008

Optimized Architectural Synthesis of Fixed-Point Datapaths.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Unsupervised Genetic Algorithm Deployed for Intrusion Detection.
Proceedings of the Hybrid Artificial Intelligence Systems, Third International Workshop, 2008

Evaluating Sequential Combination of Two Genetic Algorithm-Based Solutions for Intrusion Detection.
Proceedings of the International Workshop on Computational Intelligence in Security for Information Systems, 2008

Improved Interval-Based Characterization of Fixed-Point LTI Systems With Feedback Loops.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Fpga Acceleration for DNA Sequence Alignment.
J. Circuits Syst. Comput., 2007

Finding an internal state of RC4 stream cipher.
Inf. Sci., 2007

Improving network security using genetic algorithm approach.
Comput. Electr. Eng., 2007

Migrating a HoneyDepot to Hardware.
Proceedings of the First International Conference on Emerging Security Information, 2007

Increasing Detection Rate of User-to-Root Attacks Using Genetic Algorithms.
Proceedings of the First International Conference on Emerging Security Information, 2007

A project-based learning approach to design electronic systems curricula.
IEEE Trans. Educ., 2006

Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

FPGA for pseudorandom generator cryptanalysis.
Microprocess. Microsystems, 2006

Optimized Synthesis of DSP Cores Combining Logic-based and Embedded FPGA Resources.
Proceedings of the International Symposium on System-on-Chip, 2006

High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

PERSEIA: a Biomedical Wireless Sensor Network to Support Healthcare Delivery for the Elderly and Chronically Ill.
Proceedings of the 28th International Conference of the IEEE Engineering in Medicine and Biology Society, 2006

Domotic platform based on multipurpose wireless technology with distributed processing capabilities.
Proceedings of the IEEE 15th International Symposium on Personal, 2004

High-speed systolic array for gene matching.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, 2004

A Generator of High-Speed Floating-Point Modules.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

Analysis of limit cycles by means of affine arithmetic computer-aided tests.
Proceedings of the 2004 12th European Signal Processing Conference, 2004

Fixed-point refinement of OFDM-based adaptive equalizers: An heuristic approach.
Proceedings of the 2004 12th European Signal Processing Conference, 2004

Fast characterization of the noise bounds derived from coefficient and signal quantization.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Bit-Width Selection for Data-Path Implementations.
Proceedings of the 12th International Symposium on System Synthesis, 1999

Utilization factor of a distributed system based on an Ethernet network.
Proceedings of the 1993 Euromicro Workshop on Parallel and Distributed Processing, 1993