Pai-Yu Tan

Orcid: 0000-0002-7131-888X

According to our database1, Pai-Yu Tan authored at least 9 papers between 2020 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
A 40-nm 1.89-pJ/SOP Scalable Convolutional Spiking Neural Network Learning Core With On-Chip Spatiotemporal Back-Propagation.
IEEE Trans. Very Large Scale Integr. Syst., December, 2023

A Low-Bitwidth Integer-STBP Algorithm for Efficient Training and Inference of Spiking Neural Networks.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
A Memory Built-In Peer-Repair Architecture for Mesh-Connected Processor Array.
Proceedings of the 2022 International Symposium on VLSI Design, Automation and Test, 2022

Improving Test Quality of Memory Chips by a Decision Tree-Based Screening Method.
Proceedings of the IEEE International Test Conference, 2022

Weak Die Screening by Feature Prioritized Random Forest for Improving Semiconductor Quality and Reliability.
Proceedings of the IEEE International Test Conference in Asia, 2022

A Decision Tree-Based Screening Method for Improving Test Quality of Memory Chips.
Proceedings of the IEEE International Test Conference in Asia, 2022

2021
An Improved STBP for Training High-Accuracy and Low-Spike-Count Spiking Neural Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
A Power-Efficient Binary-Weight Spiking Neural Network Architecture for Real-Time Object Classification.
CoRR, 2020

A 90nm 103.14 TOPS/W Binary-Weight Spiking Neural Network CMOS ASIC for Real-Time Object Classification.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020


  Loading...