Panagiotis Merakos

According to our database, Panagiotis Merakos authored at least 19 papers between 1994 and 2010.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2010

A power grid analysis and verification tool based on a Statistical Prediction Engine.

Michalis K. Tsiampas, Dimitrios Bountas, Panagiotis Merakos, Nestoras E. Evmorfopoulos, Sotiris Bantas, George I. Stamoulis

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2004

A dual-band 5.15-5.35-GHz, 2.4-2.5-GHz 0.18-μm CMOS transceiver for 802.11a/b/g wireless LAN.

Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis, Nikos Haralabidis

IEEE J. Solid State Circuits, 2004

A cost-efficient 0.18 μm CMOS RF transceiver using a fractional-N synthesizer for 802.11b/g wireless LAN applications.

Nikos Haralabidis, Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

Power efficient data path synthesis of sum-of-products computations.

Kostas Masselos, Panagiotis Merakos, S. Theoharis, Thanos Stouraitis, Constantinos E. Goutis

IEEE Trans. Very Large Scale Integr. Syst., 2003

A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN.

Iason Vassiliou, Kostis Vavelidis, Theodore Georgantas, Sofoklis Plevridis, Nikos Haralabidis, George Kamoulakos, Charalambos Kapnistis, Spyros Kavadias, Yiannis Kokolakis, Panagiotis Merakos, Jacques C. Rudell, Akira Yamanaka, Stamatis Bouras, Ilias Bouras

IEEE J. Solid State Circuits, 2003

A single-chip, 5.15GHz-5.35GHz, 2.4GHz-2.5GHz, 0.18μm CMOS RF transceiver for 802.11a/b/g wireless LAN.

Kostis Vavelidis, Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Spyros Kavadias, George Kamoulakos, Charalampos Kapnistis, Yiannis Kokolakis, Aris Kyranas, Panagiotis Merakos, Ilias Bouras, Stamatis Bouras, Sofoklis Plevridis, Nikos Haralabidis

Proceedings of the ESSCIRC 2003, 2003

2002

Power Efficient Hierarchical Scheduling for DSP Transformations.

Panagiotis K. Merakos, Konstantinos Masselos, Constantinos E. Goutis

VLSI Design, 2002

Memory accesses reordering for interconnect power reduction in sum-of-products computations.

Konstantinos Masselos, Spyros Theoharis, Panagiotis Merakos, Thanos Stouraitis, Costas E. Goutis

IEEE Trans. Signal Process., 2002

Power Efficient Vector Quantization Design Using Pixel Truncation.

Kostas Masselos, Panagiotis Merakos, Constantinos E. Goutis

Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

2000

Low power architectures for digital signal processing.

Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis

J. Syst. Archit., 2000

Low power synthesis of sum-of-products computation (poster session).

Kostas Masselos, S. Theoharis, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis

Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

1999

Computation Reordering: A Novel Transformation for Low Power DSP Synthesis.

Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis

VLSI Design, 1999

Novel techniques for bus power consumption reduction in realizations of sum-of-product computation.

Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis

IEEE Trans. Very Large Scale Integr. Syst., 1999

Low power synthesis of sum-of-product computation in DSP algorithms.

Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998

Trade-Off Analysis of a Low-Power Image Coding Algorithm.

Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis

J. VLSI Signal Process., 1998

A novel algorithm for low-power image and video coding.

Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis

IEEE Trans. Circuits Syst. Video Technol., 1998

Low-power implementation of discrete wavelet transform.

Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Constantinos E. Goutis

Proceedings of the 9th European Signal Processing Conference, 1998

1996

Low-power image decoding using fractals.

Kostas Masselos, Panagiotis Merakos, Thanos Stouraitis, Costas E. Goutis

Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

1994

Hardware programming using C++.

Evaggelinos P. Mariatos, Panagiotis Merakos, Michael K. Birbas, Alexios N. Birbas

Microprocess. Microprogramming, 1994