Parthasarathi Dasgupta
According to our database1,
Parthasarathi Dasgupta
authored at least 66 papers
between 1995 and 2016.
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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on iimcal.ac.in
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on dl.acm.org
On csauthors.net:
Bibliography
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
IET Comput. Digit. Tech., 2016
Double Patterning Lithography (DPL)-compliant layout construction (DCLC) with area-stitch usage tradeoff.
Proceedings of the 20th International Symposium on VLSI Design and Test, 2016
Delay Estimates for Graphene Nanoribbons: A Novel Measure of Fidelity and Experiments with Global Routing Trees.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016
2015
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015
3D integration in biochips: New proposed architectures for 3D applications in ATDA based digital microfluidic biochips.
Proceedings of the 10th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2015
2014
Int. J. Inf. Coding Theory, 2014
A Novel Wire Planning Technique for Optimum Pin Utilization in Digital Microfluidic Biochips.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Multilevel Homogeneous Detection Analyzer for Medical Diagnostic Application in Digital Microfluidic Biochips.
Proceedings of the 2014 Fifth International Symposium on Electronic System Design, 2014
Automated two stage detection and analyzer system in multipartitioned Digital Microfluidic Biochips.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
A new technique for layout based functional testing of modules in Digital Microfluidic Biochips.
Proceedings of the 2014 East-West Design & Test Symposium, 2014
A layout based customized testing technique for total microfluidic operations in digital microfluidic biochips.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014
2013
Comput. Electr. Eng., 2013
A New Method for Route Based Synthesis and Placement in Digital Microfluidic Biochips.
Proceedings of the VLSI Design and Test, 17th International Symposium, 2013
An Intelligent Biochip System for Diagnostic Process Flow Based Integration of Combined Detection Analyzer.
Proceedings of the 2013 International Symposium on Electronic System Design, 2013
Digital microfluidic system: A new design for heterogeneous sample based integration of multiple DMFBs.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Novel designs of digital detection analyzer for intelligent detection and analysis in digital microfluidic biochips.
Proceedings of the 8th International Design and Test Symposium, 2013
A new customized testing technique using a novel design of droplet motion detector for digital microfluidic Biochip systems.
Proceedings of the International Conference on Advances in Computing, 2013
A new cross contamination aware routing method with intelligent path exploration in digital microfluidic biochips.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013
Proceedings of the 6th ACM India Computing Convention, 2013
2012
Two-level clustering-based techniques for intelligent droplet routing in digital microfluidic biochips.
Integr., 2012
A Heuristic Method for Co-optimization of Pin Assignment and Droplet Routing in Digital Microfluidic Biochip.
Proceedings of the 25th International Conference on VLSI Design, 2012
Simulation Study of an Ultra Thin Body Silicon On Insulator Tunnel Field Effect Transistor.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012
Proceedings of the International Workshop on System Level Interconnect Prediction, 2012
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012
A new digital analyzer for optically detected samples in Digital Microfluidic Biochips.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
A New Algorithm for Routing-Aware Net Placement in Cross-Referencing Digital Microfluidic Biochips.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012
Proceedings of the International Symposium on Electronic System Design, 2012
An intelligent compaction technique for pin constrained routing in cross referencing digital microfluidic biochips.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
Proceedings of the 21st IEEE Asian Test Symposium, 2012
2011
IET Comput. Digit. Tech., 2011
A Group-Preferential Parallel-Routing Algorithm for Cross-Referencing Digital Microfluidic Biochips.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Proceedings of the International Symposium on Electronic System Design, 2011
Ant Colony Optimization Based Droplet Routing Technique in Digital Microfluidic Biochip.
Proceedings of the International Symposium on Electronic System Design, 2011
Fast high-performance algorithms for multi-pin droplet routing in digital microfluidic biochips.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011
A Multi-pin Droplet Routing Algorithm for Digital Microfluidic Biochips.
Proceedings of the BIODEVICES 2011, 2011
Proceedings of the Advanced Computing, Networking and Security - International Conference, 2011
2010
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Proceedings of the 13th IEEE International Conference on Computational Science and Engineering, 2010
2009
Appl. Soft Comput., 2009
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
An internet-based IP protection scheme for circuit designs using linear feedback shift register (LFSR)-based locking.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009
2008
Proceedings of the Tenth International Workshop on System-Level Interconnect Prediction (SLIP 2008), 2008
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
A Novel Scheme for Encoding and Watermark Embedding in VLSI Physical Design for IP Protection.
Proceedings of the 2007 International Conference on Computing: Theory and Applications (ICCTA 2007), 2007
2006
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006
A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Multiobjective Genetic Algorithm for k-way Equipartitioning of a Point Set with Application to CAD-VLSI.
Proceedings of the 9th International Conference in Information Technology, 2006
2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Recent Trends in the Application of Meta-Heuristics to VLSI Layout Design.
Proceedings of the 2nd Indian International Conference on Artificial Intelligence, 2005
2004
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
2003
Range-Based Discrepancy Search with Applications to VLSI Design.
Proceedings of the 1st Indian International Conference on Artificial Intelligence, 2003
Proceedings of the 2003 Design, 2003
2002
ACM Trans. Design Autom. Electr. Syst., 2002
2001
IEEE Trans. Syst. Man Cybern. Part A, 2001
ACM Trans. Design Autom. Electr. Syst., 2001
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001
1998
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998
1997
Proceedings of the 1997 International Symposium on Physical Design, 1997
1996
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996
1995
Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995
A unified approach to topology generation and area optimization of general floorplans.
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995